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Old 10th May 2017, 07:42 AM   #1
prasi is offline prasi  India
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Default F5 layout

Wanted to make a layout for F5 as per fig 1 of http://www.firstwatt.com/pdf/art_f5_turbo.pdf for those who to want to etch their own pcb.

here it is. any comments on the layout welcome.

the ground lift components (anti parallel diodes and resistor) are optional. LED and its resistor are also optional.
mosfet mounting hole center to center distance is 64mm.

Is it enough that the NTC touches the Heatsink?
reg
Prasi
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File Type: png F5 layout Prasi-r1.png (102.7 KB, 405 views)

Last edited by prasi; 10th May 2017 at 07:49 AM.
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Old 10th May 2017, 07:49 AM   #2
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The first thing I would do is to make it mountable on the UMS standard from diyaudio, this makes it easier for people with heatsinks drilled with the UMS patern.
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Old 10th May 2017, 08:06 AM   #3
prasi is offline prasi  India
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Quote:
Originally Posted by MASantos View Post
The first thing I would do is to make it mountable on the UMS standard from diyaudio, this makes it easier for people with heatsinks drilled with the UMS patern.
Thanks, I believe its possible to make the mounting distance as 80mm by moving both the MOSFETS by 8 mm in the above design.
The PCB will still be supported by MOSFET body like shown below.
hope you understand what i want to convey.
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Old 10th May 2017, 08:06 AM   #4
BesPav is offline BesPav  Russian Federation
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It's better to provide local supply decoupling with 16/18 mm capacitors (LS=5/7,5 mm) placed near the OPS and small-signal circuitry like this:
Click the image to open in full size.
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Old 10th May 2017, 08:11 AM   #5
juma is offline juma  Germany
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Prasi,
output MOSFETs are too close - put some distance between them to avoid creating a hot spot (each of them is dissipating almost 30W). Thermistor should be close to MOSFET so they can be in direct thermal contact.
No bypass caps are needed here, they can only cause instability.
It should look something like this (post #963 and #972):
F5 power amplifier
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Last edited by juma; 10th May 2017 at 08:19 AM.
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Old 10th May 2017, 08:33 AM   #6
BesPav is offline BesPav  Russian Federation
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Quote:
Originally Posted by juma View Post
No bypass caps are needed here, they can only cause instability.

Are you really want to speak about stability?


F5 is an one-pole curcuit and it is inherently stable with it's simple feedback plot:
Click the image to open in full size.


But, of course, each one-pole system can be used as output buffer and placed inside feedback loop of higher order system like this:
Click the image to open in full size.
And there we can meet some instabilities...
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Old 10th May 2017, 08:54 AM   #7
juma is offline juma  Germany
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Quote:
Originally Posted by BesPav View Post
Are you really want to speak about stability?
Dear BesPav, I'm sure that simulation thrills you and it's good so. If you want it to really reflect the real life circuit you have to take into account all those small parasitic capacitaces and inductaces as well as non-ideal reactances that reality is made from. Otherwise, it's mostly stabbing in the dark.

I've built about a dozen of different F5 versions during the years and few times bypass caps did cause instabilities...
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Old 10th May 2017, 10:09 AM   #8
AndrewT is offline AndrewT  Scotland
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How do we explain the repeated reports of F5 blowing up after some weeks/months of successful operation?
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Old 10th May 2017, 10:19 AM   #9
prasi is offline prasi  India
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Quote:
Originally Posted by AndrewT View Post
How do we explain the repeated reports of F5 blowing up after some weeks/months of successful operation?
Well Andrew,
to be frank, I havent read about this amp too much , I came across the pdf link and I saw DIYA store PCB are available and thought to make a layout for the DIY PCB etchers.
Now I see that there is long thread on this amp as posted by Juma.

well for blowing up reports, life is a box of chocolates, you never know what you're gonna get!
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Old 10th May 2017, 10:46 AM   #10
AndrewT is offline AndrewT  Scotland
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Quote:
If you want it to really reflect the real life circuit you have to take into account all those small parasitic capacitaces and inductaces as well as non-ideal reactances that reality is made from. Otherwise, it's mostly stabbing in the dark.
I have a sneeky feeling (no more than that) it's the lack of supply rail decoupling that may be allowing intermittent oscillation and eventually causing semiconductor failure.
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