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Old 22nd December 2014, 10:43 PM   #1
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Default F5, strange problem...

Hi,

I built F5 with 2sk170, 2sj74, Fairchild mosfets.

I used Jims audio board, firstwatt look clones (nice spanned transistors...)

My problem: I was able to bias one channel, run it at 1,3 A, I shut down the power supply. Then I repowered (after 1h), and bias shot up. Luckily limited by the lab suply. Now I can't readjust bias, it shoots up on one polarity. First I set to zero bias, then I was able to bias around 0,4 A, then I cant really do any senseful adjustment...

What is a possible problem? Jfets get quite hot, I really have no idea.

With the other channel, I was in the adjustment process:

All was fine, I touched the input cable, suddenly lab supply shut down voltage(due to current limiter), Pmosfet: G=2V D=10V S=10V, Nmosfet: G-25V D=10V, S=-25V

Sj: D=-25V, G=1,9V, S=1,6V,
Sk: D=2V, G=1,9V, S=1,7V

I could not trim down the voltage, I decided, the sk was dead. removing the sk brought down the bias to zero.

My questions: Any idea?

Further questions: Which gate source voltage is required to make the fets conducting?

Is it possible, I killed the jfets (In the second case, I'm 99% sure, the sk is gone...)

I alwas thought, jfets are not in danger touching them... (the input pin..)

Please advise.

Regs, Dirk
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Old 23rd December 2014, 05:51 AM   #2
Zen Mod is offline Zen Mod  Serbia
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pics
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Old 23rd December 2014, 06:29 AM   #3
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Hi, I'll do so in the evening! Thanks.
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Old 23rd December 2014, 08:23 AM   #4
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Here some pics:

I put the pots to minimum. Current reading was: 30mA neg, 90mA pos.
then 50mA neg, 100mA pos. JFests hot, shut down.
Restart: neg, 10mA, pos 70mA, now stable.

I did some measurements:
Offset around 0,3V
Drain of Jfets: around +-23,9
Gates at 1,1V (How can this happen?)
Source K: 0,5V
Source D: 0,04V

I would expect the Gates at 0V.

When I started the first succesful current adjustment, current was about 20mA, pos and neg. I get the impression, R21, R19 suck 2mA, so talking errors in the Lab supply, there were around 15mA in the Jfets.

I get a lot of bad ideas... Maybe wrong IDSS? But I bought these from EUVL, so it should be fine. What IDSS should be used? (With the resistor values in the schematic?)

Overheating of fets due to to much current??? What confuses me most: One channel worked for 1,5h during adjustment. Then I shutdown, an connecting it again, current shot up.

The second failed during adjustment. It ran half an hour, then I touched the input cable, maybe not even electrically... Current shot up, lab supply decreased rail...

Please help to sort my ideas.
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Old 23rd December 2014, 09:27 AM   #5
AndrewT is offline AndrewT  Scotland
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Did you measure the approximate Idss of the jFETs?
What were they?

Did you measure Vp of the jFETs?
What were they?

Now re-measure to see if they are still the same.
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Old 23rd December 2014, 09:31 AM   #6
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Component leg(s) not cut close enough to board and shorting through heatsink? (Or board spacers to small?)
Touching the wire maybe moved the board just enough to short?
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Old 23rd December 2014, 08:59 PM   #7
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@AndrewT: I'll remove the Fets. I'll measure IDSS. What is Vp, how to measure?
@kristenruna: Absolutely sure that component legs didn't touch the heatsink.

Regs, Dirk
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Old 23rd December 2014, 09:10 PM   #8
Zen Mod is offline Zen Mod  Serbia
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if you bought them from Patrick , do not bother with measuring Vp (pinch voltage )

just check them for Idss , to check is gray smoke still in them

besides that - triple check all resistor value/position , all solder points , same as proper isolation of mosfets vs. heatsink

during setup procedure , inputs must be grounded , while outputs unloaded

dunno for jimsaudio schematic - is it proper or not

I hope you transposed those to using proper Diyaudio F5 schematic
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Last edited by Zen Mod; 23rd December 2014 at 09:12 PM.
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Old 23rd December 2014, 09:36 PM   #9
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Hi, tomorrow I'll measure idss. But what is vp, how can I measure??? During adjusment, I had the input open: there is 100k agains ground, so there should be ground reference...

I used the original schematic and doublechecked.
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Old 23rd December 2014, 10:23 PM   #10
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The good news with such a simple circuit is that it's a very finite number of
possibilities as to what could go wrong.

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