Recommendation for 5-10W amp.

Mos57,

Your simulated results in post no.32 look very promising but I would need to buy/build a bipolar 12V supply. The very low 3rd harmonic is most interesting. The values in your schematics are different than the one from Juma so I guess I will wait a bit to order all my components. Looks like the output power will be around 7-8W.

Thanks to all for their input and sharing their knowledge.

Eric
 
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For greater clarity of results, I reset the output offset by acting on the values ​​of the resistor feeding the emitters of the input transistors. The positive half-wave is slightly larger than the negative. Having used the same simulator and the same model of latfet the difference compared to the circuits with single power supply must be sought in some other cause.
 

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Your reasoning does not convice me for two reasons mainly.

  1. given that all the complementary pairs have more or less the same problem, one could not build amplifiers using pairs of devices.
  2. The same couple indicted, when simulated in the schematic with two batteries does not show these large discrepancies.
....
Neither of those two can't be called reasons.
1. No real life complementary pairs can be so flawed as the sim can be. Sim can be tuned to show anything one wants it to show.
2. Neither of circuits I attached in this thread has two batteries - your circuits does and it works in different manner (I'm to tired by this sim-onanie to go deeper into that) so it proves nothing.

Further discussion would be plain time wasting so I choose to do something else...
 
Hi Francesco,

I wholeheartedly agree that the circuit in #32 should have a better distortion figure compared to your previous ones. Probably due to the compensation for the difference of operating point arising from discrepancy of VT between the j162 and k1058 and other factors. The N and P LatFETs have their differences that reward those willing to go one more step.

On an F4 style output ckt with LatFET, I have also used larger value gate stopper on the N LatFET to compensate for Crs difference with good sonic result, better (smoother) transients. Have no idea how and what to measure though. FR seems unchanged.

I know nothing of simulation, so please correct me if I'm wrong. The sim result on #24 is really beyond my expectation. How could the circuit behaves as shown? What is wrong? If it were a real built circuit I would suspect that the hfe of Q1 and Q2 are way off because the Gm of the LatFETs are normally close enough. Moreover, I think the circuit in #42 is very likely to have a large negative output dc offset. Why is it that the sim result shows no dc offset at output? :scratch:

Could it be that the problem lies in the sim or the device model used?
 
Work is in progress. But why is the reason for low impedance feedback?
In this case the FB signal enter in the second base of differential pair.

As your starting point is a low impedance feedback path (the unfortunately named 'current feedback') I thought you might like to retain the low impedance. It isn't strictly necessary as you point out but the lower impedance feedback path provides more current to charge/discharge parasitic capacitances and hence has 'more drive' higher frequencies. It can produce some imbalance in the LTP though because the impedance at the input will be high. I've not enough experience to say if this is good or bad but my TGM7 has dual LTP input and neither of them are well balanced because of the bootstrap of the LTP output collector and yet it sounds very good.
 
Hi Francesco,

I wholeheartedly agree that the circuit in #32 should have a better distortion figure compared to your previous ones. Probably due to the compensation for the difference of operating point arising from discrepancy of VT between the j162 and k1058 and other factors. The N and P LatFETs have their differences that reward those willing to go one more step.

On an F4 style output ckt with LatFET, I have also used larger value gate stopper on the N LatFET to compensate for Crs difference with good sonic result, better (smoother) transients. Have no idea how and what to measure though. FR seems unchanged.

I know nothing of simulation, so please correct me if I'm wrong. The sim result on #24 is really beyond my expectation. How could the circuit behaves as shown? What is wrong? If it were a real built circuit I would suspect that the hfe of Q1 and Q2 are way off because the Gm of the LatFETs are normally close enough. Moreover, I think the circuit in #42 is very likely to have a large negative output dc offset. Why is it that the sim result shows no dc offset at output? :scratch:

Could it be that the problem lies in the sim or the device model used?


Many good questions!

Answer to the first.

The asymmetrical shape of the output voltage is not due to the different amplifications of the input transistors. That is while you expect that the amplified signal from Q1 (node 1) is much lower than that amplified by Q2 (node 4), indeed they are actually amplified substantially the same way. For much precision indeed there is a slight advantage in favor of the output level of Q1 (2.105V against 2.030 V).

I enclose explanatory drawing of the two waveforms for the transistors in contemporary relationship to the output signal from the drains of the mosfets.
 

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Hi Francesco,

Moreover, I think the circuit in #42 is very likely to have a large negative output dc offset. Why is it that the sim result shows no dc offset at output? :scratch:

Could it be that the problem lies in the sim or the device model used?

Because the VGSth of N and P mosfet are slight different. This is normal in complementary pair not well matched.

I enclose same above schematic with current and voltage node.
 

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...I enclose explanatory drawing...
Are you aware that without the feedback resistors, my circuit can not establish proper DC conditions on the output so the node where Drains connect practically sits on the rails potential and the imbalance of the waveform that you show is a simple clipping on the positive half-wave that you provoked by removing the feedback.
You take a piston out of the engine and you declare the engine flawed...
 
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Hi Francesco,
On #50, I think that it is unlikely to get 102.87mA on j162 with Vgs bias of only 37mV, it is significantly below the lowest Vgs(off) threshold. Similar but less extreme values on the k1058. I believe some parameters were missing in the calculation of the sim software or device model used.
 
Hi Francesco,
On #50, I think that it is unlikely to get 102.87mA on j162 with Vgs bias of only 37mV, it is significantly below the lowest Vgs(off) threshold. Similar but less extreme values on the k1058. I believe some parameters were missing in the calculation of the sim software or device model used.

Very careful and intelligent guy. ;)

I agree with you, I think you're right. The values ​​of VGSth models of these MOSFETs supplied with the Microcap library not will be right.
In fact, over 10 years ago I built an amp with 2SK1058 and I remember that the bias voltage was not so low.
In addition, by checking the datasheet there is confirmation that the min VGSoff value is 150 mV
Now I have downloaded the models ​​available by Cordell. When I have time I try to put them in microcap.
 

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Thank you Francesco, but I do not deserve your compliment. Just trying to contribute to the diy spirit of our forum by looking at a problem from a slightly different angle. As I said, I know absolutely nothing of Microcap or even Spice, but if a sim result is unexpected, there usually is something unaccounted for, we just need to keep a cool head and try to find it. Cheers. :cheers:
 
To meet the demand of the forumers, is finally ready simulation of a small size amplifier, between 5 and 10 watts of RMS power. I wanted to keep the simple two stages structure of the previous schemes and making the necessary changes to get a better overall result.
This clearly is in my opinion but then I leave the judgment to you.
Indeed I changed the active components, and most of all, I removed the Hitachi but not because I not consider them excellent components at all, but because I felt that their use in this circuit gave some problems. In particular, the measurement of harmonic distortion was not fully satisfactory, and then it seemed a bit excessive for the power to reach. The actual devices are among the most popular and the cheapest and I think this is an advantage for the DIYers. The models of the bjt used herein are those downloaded from the website of Bob Cordell and it are deemed reliable. I ask instead of giving news if anyone knows of the models more reliable than those standard for the output MOSFETS .

I enclose pictures in this order:
  1. general schematic with nodes number;
  2. Transient analysis at maximum power (7 watts)
  3. Frequency response;
  4. Harmonic Distortion at 1 watt;
  5. Harmonic Distortion to 5 watts;
  6. harmonic distortion to 7 watts
 

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....the measurement of harmonic distortion was not fully satisfactory....
You gave no measurements, just bad simulations...

The amp you present lacks a crucial part in the schematic - a fire extinguisher. You propose the use of HEXFETs in common source output stage without Source degeneration and without thermal compensation. Also, the freq. response won't be very good considering the high values of parasitic capacitance and high impedance, low current drive for HEXFETs (if you had a real life experience with such a circuit you wouldn't take those sims for serious).

It's irresponsible to propose the circuit that you didn't build, especially if it's prone to bursting into flames...
 
Hi Juma,

I have ordered the pieces today so I should receive them tomorrow (gotta love Digikey.)

I have heard some of your design through friend and I'm aware of how great they sound.

Thanks for providing a tested schematic and PCB layout.

Simulation is OK but nothing is as good as actually building the amp like you did :)

I will be using a SPMS, 24Vdc, 5A so hope it sounds good.

Thanks,
Eric
 
. . . I have ordered the pieces . . .
A very good and flexible starting point. Should mate very nicely with your FE206E and easily upgradeable. For your common source lateral mosfet output stage, I think the CFP bipolar input you plan to build is hard to beat.
However, since you also plan to build the F5, later you may want to plow through the gigantic http://www.diyaudio.com/forums/pass-labs/121228-f5-power-amplifier.html thread - a daunting task, but a very informative and rewarding experience. For a similar topology, I also found some interesting information at the http://www.diyaudio.com/forums/solid-state/59339-profet-amplifier.html thread, Marco's Megalith - Cooltune DIY Audio, and The Class-A Amplifier Site - Hiraga 'The Monster'.
We need to understand so many things ie. characteristics of each device, topology, layout etc. to effectively build and properly voice a schematic. And here, experience is the keyword. We just have to remember that "sounds good" means different things to different people.
 
Francesco, I can guarantee the sim in # 60 did not incorporate the variation of Vgs threshold due to temperature of the IRF into calculation.
It is quite certain that the ckt will enter fatal thermal failure within a few minutes, even with a gigantic 0.25/K HS.