input cap at D1 I/U stage

Klaus · 17th December 2003, 11:36 AM

Hi,

I´m currently building a CCS modified D1 stage für I/U conversion and output buffering. I have one not understood schematic detail. Could someone please explain to me, thanks!

The DAC I-output leads to the source of the converter FET. This source is set to zero volts by trimming the gate voltage at about 4V. The current input from the DAC modulates the current through the FET, so the voltage at the drain. The fictive work resistor is R27 with 1,5k for the PCM63. Parallel to this R27 a reconstruction filter capacitor C15 with 2,7nF is located. Everything is clear so far. But what is the job of the capacitor called C40 with 10nF right at the input from the I-DAC to ground? It lies between the source (set to 0V) and ground, so also 0V. I guess it is just for HF suppression. Or does it also have any reconstruction filter function?

I changed the D1 stage to full current source use. If the lower resistor R26 becomes a CCS, shall and can the cap C40 still be in? How is the value for this cap created, depending to the current peak of the DAC?

Regards

Klaus

joho · 28th December 2003, 04:06 PM

Hi Klaus,

There is not much response at your question!
I think you shoud take the red telephone and call the master himself on his secret number. He shoud know the answer.

I did some investigations in my good old dusty service manual's and found something in the Rotel RHCD 10 diagram.
That Rotel cd-player is/was the topmodel of the company and use a discrete I/V+buffer amp after the pcm63.
They also use a small cap(3n3) at pin 6 to ground,followed by 100R to the base of two transistors.
So there must be some reason to do this. In Holland we say "meten is weten" (do some measurements to know it).

By the way, your ero1837/panasonic FC advice at the in/output of my Aleph1.7 runs nice.

Regards,
Johan.

Pedja · 28th December 2003, 04:58 PM

Klaus,

That is the HF filtering cap. In digital, every low passing filter might have something with the reconstruction. Depends on the actual environment (the DAC in which it is used). Needed value of that cap is determined by the I/V’s input impedance. The change of the way of biasing won’t change much the input impedance but the change of the amount of the current will do it.

Pedja

Blitz · 30th December 2003, 11:00 AM

Hi Klaus,

When working on this: Have you understood how Uli modified the D1-Circuit to avoid the Coupling-Caps ?

Best Regards

17th December 2003, 11:36 AM	#1
Klaus diyAudio Member Join Date: May 2002 Location: near Frankfurt/Main	input cap at D1 I/U stage Hi, I´m currently building a CCS modified D1 stage für I/U conversion and output buffering. I have one not understood schematic detail. Could someone please explain to me, thanks! The DAC I-output leads to the source of the converter FET. This source is set to zero volts by trimming the gate voltage at about 4V. The current input from the DAC modulates the current through the FET, so the voltage at the drain. The fictive work resistor is R27 with 1,5k for the PCM63. Parallel to this R27 a reconstruction filter capacitor C15 with 2,7nF is located. Everything is clear so far. But what is the job of the capacitor called C40 with 10nF right at the input from the I-DAC to ground? It lies between the source (set to 0V) and ground, so also 0V. I guess it is just for HF suppression. Or does it also have any reconstruction filter function? I changed the D1 stage to full current source use. If the lower resistor R26 becomes a CCS, shall and can the cap C40 still be in? How is the value for this cap created, depending to the current peak of the DAC? Regards Klaus

28th December 2003, 04:06 PM	#2
joho diyAudio Member Join Date: Jul 2003 Location: Sliedrecht Z-H	C40 Hi Klaus, There is not much response at your question! I think you shoud take the red telephone and call the master himself on his secret number. He shoud know the answer. I did some investigations in my good old dusty service manual's and found something in the Rotel RHCD 10 diagram. That Rotel cd-player is/was the topmodel of the company and use a discrete I/V+buffer amp after the pcm63. They also use a small cap(3n3) at pin 6 to ground,followed by 100R to the base of two transistors. So there must be some reason to do this. In Holland we say "meten is weten" (do some measurements to know it). By the way, your ero1837/panasonic FC advice at the in/output of my Aleph1.7 runs nice. Regards, Johan.

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28th December 2003, 04:58 PM	#3
Pedja diyAudio Member Join Date: Jun 2002 Location: Serbia	Klaus, That is the HF filtering cap. In digital, every low passing filter might have something with the reconstruction. Depends on the actual environment (the DAC in which it is used). Needed value of that cap is determined by the I/V’s input impedance. The change of the way of biasing won’t change much the input impedance but the change of the amount of the current will do it. Pedja

30th December 2003, 11:00 AM	#4
Blitz diyAudio Member Join Date: Nov 2002 Location: Cologne, Germany	Hi Klaus, When working on this: Have you understood how Uli modified the D1-Circuit to avoid the Coupling-Caps ? Best Regards

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