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Old 1st March 2013, 08:44 PM   #241
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Dr. Mazzola. After I looked at the published datasheet of R100, the subject of power switching came to mind. I thought maybe you or an appointee from MSU consider starting a thread in the Class D [amplifiers] Forum. Its DIYers [our competition] will also be enchanted.

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Old 1st March 2013, 09:28 PM   #242
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Originally Posted by flg View Post
My simplistic understanding of certain points made in Mike's article boils down to this: I still don't understand why he spent all that time on the BJT?
Certainly the area of operation around the threshold is a non-linear area. Looking at the "You Won't Find a Linear Transistor Hear" box I see Gate/Base voltage as it relates to Id/Ic with constand Vd/Vc. A rising bias I, correlates to a higher Gate voltage and a change in the fx. In a typical transistor (IRF240) we apply enough bias to get good linear "sound" wich ussually means .5A to 1.5A or higher. Just as the paper points out. The first area to avoid is low threshold. Does this come down to the relative "size" of the device? If we use a 100A transistor we are cutting our throat from the begining because we wont be far enough up on that Vgs threshold curve operating at 1.5A Iq? N.P. always says we want that bias as high as we can stand it. Or is it, above that knee in the Vgs vs Ids curve?
When N.P. asked about the fx being measured as a square law funtion, I thought 2SK170, well Hell, we are operating at .1Vgs, way up on the curve from pinch-off (threshold) it's a nice strait line up there. Trying to do that with an output part is different... I guess that explains his answer
These ideas were all with the Drain Voltage held constant. I beleive N.P. was eluding to and interaction with the drain behaviour that allows for 2nd order H cancelation I didn't really get that from this article
All in due time. Drain behavior is Part II.

As I watch the terrific ideas being posted, I am getting a sense for what is wanted by you all, what is known by you all, and what is still a mystery.

Obviously, excellent performance in the THD category is what is wanted, and with non-linear gain devices, you surely have to work for it.

But with a variety of methods found in the circuits of choice (I'm getting a real sense it's the F6) it can be achieved. And when it is achieved, if not absolutely optimum (one hardly ever knows when that has been achieved), but so good that it's worth talking about, you all call it the "sweet spot." That much I've learned for sure.

Kind of known is where the sweet spot might be found. But to say "go to this bias point and you will find it for a SJEP120R100A" but not for a SJEP120R100 seems improbable to me. The R100 and R100A are the same thing. Same lots, same wafers, different gate-leakage outcome only because of the fortunes of war (i.e., vagaries of yield in manufacturing). Consider this: It is entirely possible (maybe not probable, but possible) that the die in your package marked SJEP120R100 was manufactured on the same wafer and adjacent to the die in your package marked SJEP120R100A. If you see differences, check the date code on the package. It's most likely traceable to a different lot in the fab. Ditto for the data sheet differences. Different revisions.

If you say it will be found roughly "here" or "there" for any SJEP120R100A, that is improbable unless the sweet spot is not a spot at all, but a region. Then the idea of an average sweet spot becomes quite useful. Since you all have wisely made the distinction between "average" sweet spot and some other kind ("intrinsic" was one word used which I like) then we are getting somewhere. I have attached to this email the transfer curves for six different SJEP120R100's that I recently "matched" into three pair as measured Id vs. Vgs at room temp. The variation is too much to make part number a very good indication of reproducible performance. That's why I wouldn't use a Spice model to estimate the location of a sweet spot. Even worse, a data sheet.

But you guys know how these SemiSouth JFETs actually perform in real DIY Pass amplifiers way better than me, so if you can specify an "average" location where the sweet spot will be found, I have to bow to your superior knowledge. Such a thing must exist.

I reconcile this by assuming that the region of the sweet spot is broad enough to largely accommodate part to part variation. That's a very interesting, and important, assumption. I will definitely search for that evidence in my analysis for Part II of "What's the Buzz?" My analysis can work on individual parts with the right data input. Data is an issue already raised as an obstacle for many DIY'ers, but I'll make some suggestions for that in Part II. But the same algorithms can also be directed to locating the "average" sweet spot too. Looks like that is something to focus on.

It looks to me like the answer maybe nearby. The 2SC4004 appears rather unwelcome here (transistors don't have feelings, so nothing to worry about). But the "sweet spot" for the 2SC4004 shows up on the output curves as a broad region. Hmmm, could that be a big fat hint for finding something similar for the SemiSouth JFET of your choice? The problem is that with external load line canceling the output curve spacings don't equalize in front of our eyes like they did with the 2SC4004, which had internal load line canceling to thank for immediately revealing where to bias the transistor. That made it so much easier to spot the sweet spot than what we have so far seen with our beloved SemiSouth JFETs. Maybe we should measure the output curves differently? Food for thought.

Beware, however, at assuming that the JFET transfer curves are "straight" at the higher drain bias. Nothing of the sort, I am afraid. That is an optical illusion that comes from plotting a high gain curve on a linear scale. The THD meter is not fooled. Neither is the curve tracer plotting the output curves. The clearly non-linear separation of the family of curves tells us the awful truth. The shape of the transfer curve might become simple enough to allow a low-degree-of-freedom curve fit like a quadratic polynomial (easily taken for a square law) to fit it, but it is not straight. To get any where near the THD you guys want, active straightening is required. Load-line canceling is the most obvious effect being used. But let's say I have my suspicions that the high gain of the JFET can be as much or more responsible for this if the amplifier has negative feedback to trade the gain (now we're talkin Part III). Pass amplifiers do have negative feedback of one type or another. Really, load line canceling is just another form of negative feedback, but I'm getting ahead of myself.

Well, consider this little post a preview of Part II. I'm having too much fun learning from you guys. I gotta get back to work...
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Old 1st March 2013, 09:30 PM   #243
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Originally Posted by Antoinel View Post
Dr. Mazzola. After I looked at the published datasheet of R100, the subject of power switching came to mind. I thought maybe you or an appointee from MSU consider starting a thread in the Class D [amplifiers] Forum. Its DIYers [our competition] will also be enchanted.

Best regards
Sounds interesting. But I have to be careful not to be burned at the stake.
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Old 1st March 2013, 09:43 PM   #244
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The spawn of distortion, is harmonics. Another little gremlin to tackle. But i dare not argue, as I am foolin with the big boys on this one. Did you get a chance to read up on Ba3 article? I constantly find myself looking for distortion. I liked to be lied to. What can i say. Crazy audio people.
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Old 1st March 2013, 10:00 PM   #245
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Dr. Mazzola. Are the plots you showed earlier from "pulse" testing?. I hope that your following article will shed light on the testing methodology. Please examine the schematic of diyF6. The two R100A are on a generous heat sink. I see the possibility to use this assembled amp to methodically [linearly] generate their static transfer curves. One has a variac to adjust +/-Vds, and the R100As has bias control to scan Idss.
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Old 1st March 2013, 10:23 PM   #246
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Originally Posted by Antoinel View Post
Dr. Mazzola. Are the plots you showed earlier from "pulse" testing?. I hope that your following article will shed light on the testing methodology. Please examine the schematic of diyF6. The two R100A are on a generous heat sink. I see the possibility to use this assembled amp to methodically [linearly] generate their static transfer curves. One has a variac to adjust +/-Vds, and the R100As has bias control to scan Idss.
Yes, fast pulse testing. And even more than that, "sweep" followed by "single" step generation to confirm the sweep trace. And even more than that, low enough offset that dc current does not flow before I push the "single" button. Changes in junction temperature will really foul up the measurements.

You're on to something about using an amplifier to measure the static transfer curves. That's something every DIY'er will have (eventually, once they finish one). I had the same thought for fixing the data source problem. I couldn't afford a Tek 370B on my own nickel. No shame in using what you got.
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Old 1st March 2013, 11:29 PM   #247
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Dr. Mazzola. Thank you for the plots you showed earlier. I'll put a ruler to each of paper copies and get the best estimate of a linear function to determine a sweet spot. The plots are the best tool available today.
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Old 2nd March 2013, 12:38 AM   #248
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Originally Posted by Antoinel View Post
Dr. Mazzola. Thank you for the plots you showed earlier. I'll put a ruler to each of paper copies and get the best estimate of a linear function to determine a sweet spot. The plots are the best tool available today.
Dr. Mazzola. I superimposed the graphs manually. The net graph is attached.
  • DUT #1 is different from the similar #0 and 2 devices. Will I be happy if I used DUTs 1 and 2 in diyF6?
  • Let 1.5 A be the idle state [that of the idle sweet spot]
  • The transfer functions are more curved heading to values lower than 1.5 A and more linear at values higher than 1.5 A. Inclination to believe the pulse sweet spot [Id] is higher than 1.5 A.
  • Vgs for the similar devices is ~1.3 V
  • There is an inclination to assume there is a discrepancy between the static [established by Pass and DIYers] and the pulse sweet spots.
  • Temperature effect; pulse at 20 Celsius ? and static at ~50 Celsius.
Best regards.
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Old 2nd March 2013, 12:42 AM   #249
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I didn't had impression that Pass was talking about sweet spot , in static context

there is no THD in static
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Old 2nd March 2013, 12:53 AM   #250
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I am static.
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