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Dr. Mazzola. After I looked at the published datasheet of R100, the subject of power switching came to mind. I thought maybe you or an appointee from MSU consider starting a thread in the Class D [amplifiers] Forum. Its DIYers [our competition] will also be enchanted.

Best regards
 
My simplistic understanding of certain points made in Mike's article boils down to this: I still don't understand why he spent all that time on the BJT?
Certainly the area of operation around the threshold is a non-linear area. Looking at the "You Won't Find a Linear Transistor Hear" box I see Gate/Base voltage as it relates to Id/Ic with constand Vd/Vc. A rising bias I, correlates to a higher Gate voltage and a change in the fx. In a typical transistor (IRF240) we apply enough bias to get good linear "sound" wich ussually means .5A to 1.5A or higher. Just as the paper points out. The first area to avoid is low threshold. Does this come down to the relative "size" of the device? If we use a 100A transistor we are cutting our throat from the begining because we wont be far enough up on that Vgs threshold curve operating at 1.5A Iq? N.P. always says we want that bias as high as we can stand it. Or is it, above that knee in the Vgs vs Ids curve?
When N.P. asked about the fx being measured as a square law funtion, I thought 2SK170, well Hell, we are operating at .1Vgs, way up on the curve from pinch-off (threshold) it's a nice strait line up there. Trying to do that with an output part is different... I guess that explains his answer :smash:
These ideas were all with the Drain Voltage held constant. I beleive N.P. was eluding to and interaction with the drain behaviour that allows for 2nd order H cancelation I didn't really get that from this article :D

All in due time. Drain behavior is Part II.

As I watch the terrific ideas being posted, I am getting a sense for what is wanted by you all, what is known by you all, and what is still a mystery.

Obviously, excellent performance in the THD category is what is wanted, and with non-linear gain devices, you surely have to work for it.

But with a variety of methods found in the circuits of choice (I'm getting a real sense it's the F6) it can be achieved. And when it is achieved, if not absolutely optimum (one hardly ever knows when that has been achieved), but so good that it's worth talking about, you all call it the "sweet spot." That much I've learned for sure.

Kind of known is where the sweet spot might be found. But to say "go to this bias point and you will find it for a SJEP120R100A" but not for a SJEP120R100 seems improbable to me. The R100 and R100A are the same thing. Same lots, same wafers, different gate-leakage outcome only because of the fortunes of war (i.e., vagaries of yield in manufacturing). Consider this: It is entirely possible (maybe not probable, but possible) that the die in your package marked SJEP120R100 was manufactured on the same wafer and adjacent to the die in your package marked SJEP120R100A. If you see differences, check the date code on the package. It's most likely traceable to a different lot in the fab. Ditto for the data sheet differences. Different revisions.

If you say it will be found roughly "here" or "there" for any SJEP120R100A, that is improbable unless the sweet spot is not a spot at all, but a region. Then the idea of an average sweet spot becomes quite useful. Since you all have wisely made the distinction between "average" sweet spot and some other kind ("intrinsic" was one word used which I like) then we are getting somewhere. I have attached to this email the transfer curves for six different SJEP120R100's that I recently "matched" into three pair as measured Id vs. Vgs at room temp. The variation is too much to make part number a very good indication of reproducible performance. That's why I wouldn't use a Spice model to estimate the location of a sweet spot. Even worse, a data sheet.

But you guys know how these SemiSouth JFETs actually perform in real DIY Pass amplifiers way better than me, so if you can specify an "average" location where the sweet spot will be found, I have to bow to your superior knowledge. Such a thing must exist.

I reconcile this by assuming that the region of the sweet spot is broad enough to largely accommodate part to part variation. That's a very interesting, and important, assumption. I will definitely search for that evidence in my analysis for Part II of "What's the Buzz?" My analysis can work on individual parts with the right data input. Data is an issue already raised as an obstacle for many DIY'ers, but I'll make some suggestions for that in Part II. But the same algorithms can also be directed to locating the "average" sweet spot too. Looks like that is something to focus on.

It looks to me like the answer maybe nearby. The 2SC4004 appears rather unwelcome here (transistors don't have feelings, so nothing to worry about). But the "sweet spot" for the 2SC4004 shows up on the output curves as a broad region. Hmmm, could that be a big fat hint for finding something similar for the SemiSouth JFET of your choice? The problem is that with external load line canceling the output curve spacings don't equalize in front of our eyes like they did with the 2SC4004, which had internal load line canceling to thank for immediately revealing where to bias the transistor. That made it so much easier to spot the sweet spot than what we have so far seen with our beloved SemiSouth JFETs. Maybe we should measure the output curves differently? Food for thought.

Beware, however, at assuming that the JFET transfer curves are "straight" at the higher drain bias. Nothing of the sort, I am afraid. That is an optical illusion that comes from plotting a high gain curve on a linear scale. The THD meter is not fooled. Neither is the curve tracer plotting the output curves. The clearly non-linear separation of the family of curves tells us the awful truth. The shape of the transfer curve might become simple enough to allow a low-degree-of-freedom curve fit like a quadratic polynomial (easily taken for a square law) to fit it, but it is not straight. To get any where near the THD you guys want, active straightening is required. Load-line canceling is the most obvious effect being used. But let's say I have my suspicions that the high gain of the JFET can be as much or more responsible for this if the amplifier has negative feedback to trade the gain (now we're talkin Part III). Pass amplifiers do have negative feedback of one type or another. Really, load line canceling is just another form of negative feedback, but I'm getting ahead of myself.

Well, consider this little post a preview of Part II. I'm having too much fun learning from you guys. I gotta get back to work...
 

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Dr. Mazzola. After I looked at the published datasheet of R100, the subject of power switching came to mind. I thought maybe you or an appointee from MSU consider starting a thread in the Class D [amplifiers] Forum. Its DIYers [our competition] will also be enchanted.

Best regards

Sounds interesting. But I have to be careful not to be burned at the stake. :D
 
The spawn of distortion, is harmonics. Another little gremlin to tackle. But i dare not argue, as I am foolin with the big boys on this one. Did you get a chance to read up on Ba3 article? I constantly find myself looking for distortion. I liked to be lied to. What can i say. Crazy audio people.
 
Dr. Mazzola. Are the plots you showed earlier from "pulse" testing?. I hope that your following article will shed light on the testing methodology. Please examine the schematic of diyF6. The two R100A are on a generous heat sink. I see the possibility to use this assembled amp to methodically [linearly] generate their static transfer curves. One has a variac to adjust +/-Vds, and the R100As has bias control to scan Idss.
 
Dr. Mazzola. Are the plots you showed earlier from "pulse" testing?. I hope that your following article will shed light on the testing methodology. Please examine the schematic of diyF6. The two R100A are on a generous heat sink. I see the possibility to use this assembled amp to methodically [linearly] generate their static transfer curves. One has a variac to adjust +/-Vds, and the R100As has bias control to scan Idss.

Yes, fast pulse testing. And even more than that, "sweep" followed by "single" step generation to confirm the sweep trace. And even more than that, low enough offset that dc current does not flow before I push the "single" button. Changes in junction temperature will really foul up the measurements.

You're on to something about using an amplifier to measure the static transfer curves. That's something every DIY'er will have (eventually, once they finish one). I had the same thought for fixing the data source problem. I couldn't afford a Tek 370B on my own nickel. :eek: No shame in using what you got.
 
Dr. Mazzola. Thank you for the plots you showed earlier. I'll put a ruler to each of paper copies and get the best estimate of a linear function to determine a sweet spot. The plots are the best tool available today.

Dr. Mazzola. I superimposed the graphs manually. The net graph is attached.
  • DUT #1 is different from the similar #0 and 2 devices. Will I be happy if I used DUTs 1 and 2 in diyF6?
  • Let 1.5 A be the idle state [that of the idle sweet spot]
  • The transfer functions are more curved heading to values lower than 1.5 A and more linear at values higher than 1.5 A. Inclination to believe the pulse sweet spot [Id] is higher than 1.5 A.
  • Vgs for the similar devices is ~1.3 V
  • There is an inclination to assume there is a discrepancy between the static [established by Pass and DIYers] and the pulse sweet spots.
  • Temperature effect; pulse at 20 Celsius ? and static at ~50 Celsius.
Best regards.
 

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I didn't had impression that Pass was talking about sweet spot , in static context

there is no THD in static
Zen Mod. I agree. My writing was not clear. Static meant idling diy F6 first at 1.5 A. Then let the amperage move up and down a transfer function to express itself because of the signal. The function [performance ]is linear and symmetrical up [to higher amps] an down [to lower amps] from the center point of 1.5 A . This linearity is expressed as % THD. It was determined by Mr. Pass and lhquam [beforePass loop feedback] to be an impressive value of less than 0.1% in his article on F6.

Question for Dr. Mazzola. What is expected % THD of the transfer function which is attendant to the device [any of the shown 3 DUTs] moving down along the trajectiry to 0.5 A from 1.5 A and then moving up to 2.5 A for a sine wave?
 
I have been following along,but i am a bit confused with the transfer characteristics and the sweet spot. Isn't it the case that if the application is a class a PP like F6 then the sweet spot is not as critical due to 2nd h cancelation and for Single ended the sweet spot should be found ridding on the desired loadline?

Alfredo
 
I have been following along,but i am a bit confused with the transfer characteristics and the sweet spot. Isn't it the case that if the application is a class a PP like F6 then the sweet spot is not as critical due to 2nd h cancelation and for Single ended the sweet spot should be found ridding on the desired loadline?

Alfredo
Thank you avincenty for responding. Please keep in touch. Schade or Pass feedback issues are forthcoming. Forgive me; but I hope that those who are more experienced and know more than I, can address your question. Maybe it helps to recognize that a stand- alone device can have a sweet spot [e.g. Mr. Rothacher's L'Amp a simple SIT amp ] by inspecting its transfer curve/function. What happens when it is assembled into an amp with other devices is your valid question.
Best regards
 
Official Court Jester
Joined 2003
Paid Member
it seems that this 3-part article series is like Pulp Fiction

everything will suddenly fall in place , after reading last part

:devily:

however - I think that Semisouthfan is not a guy who can answer your question , at least not right now .

Mithrandir can - he's the one who tortured poor F6 ( and entire family ) with pillow and comfy chair torture ( in some circles known as with brain augmented AP something )

;)
 
I have been following along,but i am a bit confused with the transfer characteristics and the sweet spot. Isn't it the case that if the application is a class a PP like F6 then the sweet spot is not as critical due to 2nd h cancelation and for Single ended the sweet spot should be found ridding on the desired loadline?

Alfredo

That's my simple understanding, but what do I know? As ZM points out, I haven't even listened to an amp yet. But lurking in all of this (from my analysis) is at least some linearisation from traditional forms of negative feedback. How much requires pushing the pencil.
 
Does anyone really know about the GaN devices? Are they similiar to Sic? How might a GaN device perform compared to an R100? Are there any available to try?
Also possibly, is a GaN structure suitable to create a SIT device? Thx :D

At the risk of my comments becoming obsolete quickly, GaN, based on my team's attempts to get it, is mostly at the pre-commercial stage. The quasi-exception is EPC. By "quasi" I mean the rated voltage levels are too low to be a competitive alternative for SiC in switching, but for audio? Maybe. Looking at performance, EPC has two products that might be replacements for the R100: the EPC2012 and the EPC2015.

The EPC2012 has a rated Rds(on) of 0.1 Ohm, so this is the obvious first choice to consider. Alas, this is definitely NOT an R100, as the power dissipation is limited to 10 W at TC = 25 C, which must be derated to accommodate realistic heat sink temperatures. Maybe a preamp candidate. Availability is the bright spot. You can apparently buy some from inventory at DigiKey. Cost is bearable in absolute terms, but maybe pricey considering it appears unsuitable for a power stage.

The EPC2015 has a much lower rated Rds(on) but a drain current rating more like an R100. The power dissipation is still light, though, at 30 W before derating for realistic heat sink temperature when compared to 114 W for the R100 at TC = 25 C. The limited drain source voltage of 40 V might not seem too big a deal, but this is around where some amps are operating. And beware, a warning of how rugged (or lack thereof) this GaN on Si technology is can be measured by the highly unusual rating just under the traditional absolute maximum voltage rating on the data sheet: the transistor can handle "up to" 10,000 48-V, 5-ms pulses at 125 C. That's a nice way of saying EPC does not know what will happen to their device if you exceed the voltage rating. And, as the whole wide bandgap community knows, the rating at VDS = 40 V is a knock down from the design value to accommodate uncertain reliability of this inherently defective material technology. On top of that, DigiKey lists zero in inventory, casting doubt on the actual availability "score" for the EPC2015.

There are several other credible GaN suppliers out there, and not everyone is taking the highest risk approach of GaN on Silicon like EPC. But availability is uncertain at best because they are restricting release of data, let alone parts, to the general public. That may change in coming months and certainly in the next year or two for at least one provider that I have better insight into; but one can never be sure until it happens.

Lastly, the basic GaN transistor technology is the High Electron Mobility Transistor or "HEMT" also known as the "HFET" for heterojunction field effect transistor. They are commercially proven for RF (cellular phone base stations, for example) but that is mostly GaN grown on SiC, NOT silicon. Anyway, this transistor is similar in ways to the lateral form of the JFET known as the MESFET, but because it is a heterojunction structure, the similarities fall off quickly. SIT like properties are not inherent to the lateral HEMT to my knowledge.
 
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