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Old 20th August 2012, 12:46 AM   #901
The Dastardly Dad of Three
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Quote:
Originally Posted by buzzforb View Post
Antionel,
I could be totally wrong, but I was considering this if both fets are seeing the same signal.

KAsey,
What is preventing DC through the coils? Doesnt the coil see the DC bias for the fet or is your cap stopping that?
There is no DC through the coils because the insides of the fet looks like a blocking capacitor between the gate and the source (simplification i know) therefore no dc current can flow.

Regarding the capacitor in my diag, that was there just to stop oscillation risk with the hitachi 2sk parts. It doesn't do any DC blocking. Also, I found that it wasn't needed with the semisouth R100s.
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Old 20th August 2012, 12:50 AM   #902
lhquam is offline lhquam  United States
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Correction to the Frequency Sweep plot in post #890. A software bug was causing the weird behaviour at low frequencies.
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Old 20th August 2012, 12:50 AM   #903
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Originally Posted by lhquam View Post
You shouldn't need those caps.
The main problem with this circuit is that it is sensitive to rail voltages. If the fluctuate, the bias changes. There will be only a couple of microamps through the coils due to the FET gate leakage. Otherwise there is no DC path. My R100s have Vgs=1.33V at 1.3A.
Ah ok I understand. Thank you for the patient explanation - much appreciated.
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Old 20th August 2012, 12:51 AM   #904
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Seems counter intuitive, but I am a newb.
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Old 20th August 2012, 01:02 AM   #905
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Quote:
Originally Posted by lhquam View Post
You shouldn't need those caps.
The main problem with this circuit is that it is sensitive to rail voltages. If the fluctuate, the bias changes. There will be only a couple of microamps through the coils due to the FET gate leakage. Otherwise there is no DC path. My R100s have Vgs=1.33V at 1.3A.
Is this because the secondaries are not referenced to ground?
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Old 20th August 2012, 02:23 AM   #906
lhquam is offline lhquam  United States
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ZM has dropped enough hints that much of the solution F6 design can be deduced. There have been many detours and blind alleys in this thread, but one or more solutions are near.

Since Nelson has not given any detailed performance data, I cannot judge how my "simple design" compares, but I suspect it is close.
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Old 20th August 2012, 03:39 AM   #907
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What detailed performance data are you looking to compare?

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Old 20th August 2012, 04:08 AM   #908
lhquam is offline lhquam  United States
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Quote:
Originally Posted by Nelson Pass View Post
What detailed performance data are you looking to compare?

How about the frequency sweep in post 902, and the other plots in post 890? 1 watt into 8 ohms 1.3A bias on SS R100s. JT-123-FTPCH tx.

The bias in my build is rock-solid. The positive tempco in those SIC JFETs is really nice.

BTW: Looking at the Jensen JT-123-FTPCH documentation, the THD vs frequency behaviour seems to track well. It suggests that my input driver stage needs a lower impedance. I need to try matched K170/J74s in parallel.

Last edited by lhquam; 20th August 2012 at 04:13 AM.
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Old 20th August 2012, 07:56 AM   #909
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Quote:
Originally Posted by buzzforb View Post
If drawn with the PSU, don't we see that both fets are passing signals through the PSU to the load, sort of like a circlotron. That is why Kasey got double the gain of what a single fet would yield
That is a nice way of saying it, though nobody told that story about the BA1
Of course the FET opens up a current capability I independent of the load, hence the output impedance is high and in a load R it will by itself just do I x R = V. And in Kasys example and the full F6, this is V=2IxR of course.
  • About a pentode we often say it is a voltage amplifier.
  • Vout does not track the Vin at all (V is transconducted mystically by Gm to I). And because of the high output impedance of the FET, like a pentode, I like to still call it a voltage amplifier (stupid me, I am dancing on the point of a needle I'm afraid).

IMHO it is the smart feedback that Papa devised for the F6 (and that is different from other similar schema's I have seen) that brings this pentode or typical FET behavior back to normal. I'll be up to it I hope in a few months.
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Old 20th August 2012, 08:17 AM   #910
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I'm on the Mountain now , without special need for M6-ing

anyway ,few lines :

-no need for astronomic current through bias voltage divider ; 1-5mA is all you need
-feed lower one from +PSU leg , less work for cap across reference part of divider
-load secondary with at least 47K (not much less, please) ; in case of using bias pathh through secondary (one side seeing just gate ) , put that resistor across coil
-as my man Buzz wrote -upper biasing circ of BA1 is having all you need to know -impedances etc.
with or without zener , your choice

hasta la vista Baby ..... Pa is around

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Last edited by Zen Mod; 20th August 2012 at 08:22 AM.
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