F6 Amplifier

Official Court Jester
Joined 2003
Paid Member
not exactly

but - in situation in which we are , where Papa is still leaving us in the dark ( even if we are mostly responsible for dark itself) , it's counterproductive to continue guessing

major dilemma is - is it push pull or is it some sort of SE

in both ways we can guess and make decent amp .

question is now - which path is Papa's ?

I already drew some possible variations , and these are not even all .

each can be and must be tested and polished , but we are given with all needed details - source resistors for most linear behavior of SS Jfets , possible biasing techniques etc. .... but this thread is ( for now ) strictly about F6 , and just later we can play with (similar) iterations
more different ones deserve dedicated threads , mostly to not pollute this thread even more

and - yes - I didn't read that Papa sez that Jfets are depletion ?

I meant they're plain enhanced mode types ......
 
Official Court Jester
Joined 2003
Paid Member
what if one Jfet is depletion mode , and second one is enhanced mode .........

is that changing anything?
 

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what if one Jfet is depletion mode , and second one is enhanced mode .........

is that changing anything?
Now that is an interesting [maybe genius] development. You suggest introducing a deliberate mismatch in the output JFETs; while the rest of the components and attendant signals supporting them are highly matched. Worth mulling the consequences over.
 
you are waxing philosophical...but your point is well taken


Seriously thought...is this expected to be a project that is the "next step"? You know...worthy successor and all that?

I caught an interview with Nelson Pass. He is a very bright guy. I know of people selling their Macs so they can buy Pass amps...so he definitely has his stuff together.

I have often wondered how he balanced his support for DIY (which I appreciate) with his need to sell amps but I think he has discovered that you get as much as you give. A secret I wish everyone knew.
 
Now that is an interesting [maybe genius] development. You suggest introducing a deliberate mismatch in the output JFETs; while the rest of the components and attendant signals supporting them are highly matched. Worth mulling the consequences over.
It is genius. THe upper JFET is an Enhancement device and the lower JFET is a Depletion device. Thus, my simplistic mental picture in an earlier thread works. For a positive drive, the channel of the upper JFET is open and that of the bottom one is choked. Current flows from the enhancement JFET to the load to ground. For a negative drive, the depletion device turns on and the enhancement JFET simultaneously turn off. Current flows from ground through the load and though the lower depletion JFET.