F5 Semi-Turbo with Lateral Mosfets... - Page 3 - diyAudio
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Old 19th June 2012, 01:24 AM   #21
fab is offline fab  Canada
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Quote:
Originally Posted by Paulv View Post
main difference with -f5-meets-buzquito:
R14 R16, ( i like this trick!)
exact resistor values to be detrermined
with 2sk2013 2sj313 if I can get them
psu 32 volts plus 5 volts for drivers
and cascodes for jfets
thanks for your help
comments welcomed

cheers
Paul
Hi Paul

Your latest schematics does not really fit in this thread but more in the f5-meets-buzquito thread if it is no more common source output stage. ...
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Old 19th June 2012, 01:41 AM   #22
fab is offline fab  Canada
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Quote:
Originally Posted by Paulv View Post
here are more thinking:
R7 and R10 to smooth dissipation in M3 and M4 (values to be determined with CISS rise with lower voltage across M3 and M4) advice welcomed

R14 and R16 with CTN to adjust bias independently of gain

R24 and R4 to choose / balance gain of devices

notice high value of R5: 47k! with C2 forms a low pass and seems to give very good results in LTSPICE on square signal 100kHz with C1 (much less noise on fft analysis and no overshot!)

I took M3 M4 IRF9640 IRF530 available in LTSPICE, I read with interrest f5-meets-buzquito and would like to find the best compromise: not obsolete, VGSoff>2volts, low power TO220?... and probably mount them on a small independant dissipator... R1 and R9 could be 100 ohm or more in a linear region.

as for OLG / NFB ... and linearity I am a newbee I do not know where to go!
and SPICE is not real life, shure we are all aiming for the best, that's the magic of this site!

cheers
Paul
Hi Paul

R7 and R10 just limits the possible voltage swing of the stage. Just use a proper dissipator instead...

Your input low pass filter is for 15392 Hz

The p-mosfet I indicate in the first post schematics are readily available and have a VGSoff of 3 to 5V (TO-220) which is what is required. The IRF device are not the best device for linearity...

For R1 and R9 you want a medium current to drive the output mosfet and operate in the more linear current portion of the medium power mosfet transistor... so you should stay with a lower value than 100 ohms... Again, see the first post schematics.

For the OLG/NFB, my goal is to obtain a similar one as the original F5 thus the schematics of first post...

Thanks

Fab
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Old 19th June 2012, 04:19 PM   #23
Paulv is offline Paulv  France
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Default and the winner of the day is....

Thank you Fab for your interrest and support

this one will remind you something!

seems to work very well on square signals: no overshot with 1uF on output,
real JFET would be : 2N5462/5459, unless you suggest differently...

OLG: about 48dB /1pair/8Ohm , will need two pairs of laterals for bass channel (4Ohm)

not too sure about temperature compensation, main concern is with input jfets
the bias jfet:2.4 mA/1...4 volts so less heat than inputs, reduce cascode voltage...
or elaborate some sort of compensation or automatic bias, thermistor will not help much IMO.

cheers
Paul
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Old 19th June 2012, 04:35 PM   #24
AndrewT is offline AndrewT  Scotland
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A question or three:
I see the cascode resistors R10 & 18 tied to Signal Ground.

Q1.) would the circuit still operate properly if these two resistors were detached from Ground and just connected to each other?
Or

Q2.) do each of the cascodes need to be referenced to a ground to operate properly?

Q3.) would performance deteriorate if these resistors were tied into Power Ground?
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regards Andrew T.

Last edited by AndrewT; 19th June 2012 at 04:38 PM.
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Old 19th June 2012, 04:58 PM   #25
Paulv is offline Paulv  France
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hello andrew
I did not intend to design anything special for R10 18, just rushing the drawing...

Q1 I would say yes, some people do it, I think use one 10k res and one cap for same result, but please take advice from other people as well!

Q2 IMO: no

Q3 as long as you use a good decoupling cap, i should work ok

... I'm no professionnal, other people will certainly be more competent

Paul
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Old 19th June 2012, 05:31 PM   #26
tinitus is offline tinitus  Europe
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hey, btw, another member did this too, but right I cant remember much more

and another btw did you think of BA-3 with laterals instead of F5 ?
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Old 19th June 2012, 05:36 PM   #27
Paulv is offline Paulv  France
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oups
Q2: cascode is a mean to reduce the voltage on jfets, and reduce internal capacitance effect, and helps with PSRR, so you only need to have the bases of the transistors to a stable and filtered voltage.
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Old 19th June 2012, 05:42 PM   #28
Paulv is offline Paulv  France
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BA-3? what is it?
everyone seems to like F5, I like it's simplicity, at least I can understand !
and not too complicated to build.... except the "plumbing": dissipators, PSU...
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Old 20th June 2012, 07:18 PM   #29
tinitus is offline tinitus  Europe
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Quote:
Originally Posted by Paulv View Post
BA-3?
I expect you have found it by now

btw, it was our good man Juma with the thread 'F5 meets Buzquito'

now that I think about it, he might have inspired Nelson to design the new F5 like frontend/driver for the BA3
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Old 20th June 2012, 09:46 PM   #30
tinitus is offline tinitus  Europe
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Originally Posted by tinitus View Post
did you think of BA-3 with laterals instead of F5 ?
guess Im as good as dead now
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