F5 Semi-Turbo with Lateral Mosfets... - Page 2 - diyAudio
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Old 15th June 2012, 12:23 PM   #11
Paulv is offline Paulv  France
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yes I remove allmost everything, keeping:

laterals
R1 preselected for YFs matching (I prefer avoiding adjustable resistor in signal path)
zener 15volts between R1 and jfet
jfet
plus adjustable resistor between rail and jfet (bias adjust) "Rb"

this resistor "Rb", with the help of zener will "steal" current from R1 and adjust bias,
the zener keeping a fairly constant and high voltage across it, (plus Vgs of laterals, unfortunately)
another drawback is less gain but one can have a rather big value for R1, at the cost of bandwith...

the zener replaces the cascode (not so good for PSRR but ok for JFet voltage)

my plans do not have any temperature compensation nor source resistor, simpler than F5! so I need a good zener (stable in temperature) or equivalent LEDs? IR diodes?
your suggestions ale welcomed for stability and sound quality.

project: multiway 4 amp per side, total: 8!
1 "double" lateral
SMPSU: +/-32v 800W x2 from connexelectronic, yes SMPSU! I will be shot for that!!!

bias: 50...500 mA? I hope to find a "magic bias" to have linear gain in the crossover region and identical to the gain in class B region...
(square law rules from Ian Hegglun)

Cheers
Paul
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Old 16th June 2012, 03:52 PM   #12
Paulv is offline Paulv  France
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trying to put an image (!)
added Q1 and Q2
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Old 16th June 2012, 04:24 PM   #13
fab is offline fab  Canada
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Default different approach...

Quote:
Originally Posted by Paulv View Post
trying to put an image (!)
added Q1 and Q2
OK, I understand now. Thanks for the picture.

This is interesting, you have replace the resistive load by a current source but you use only a portion of the voltage drop (and current too...) through the resistor to bias de Lateral mosfet.... Are you sure you have enough drive current for the mosfet?

Have you evaluated how much more gain in the input stage that it will provide compared to the single resistor to compensate for the lower gain of the Lat mosfet compared to vertical?
What are your reasons to avoid cascode in the input stage?

I suppose that you will still use double die Lateral mosfet (single or double pairs?) to ensure enough overall gain...

Does it sim well?

Thanks

Fab

Last edited by fab; 16th June 2012 at 04:26 PM.
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Old 16th June 2012, 09:41 PM   #14
Paulv is offline Paulv  France
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It sims well but it's the first time i use LT spice and I had some trouble finding the right components: jfets (IDSS a bit high),1 pair laterals double die (I forced VGS off a bit high: 0.8volts which vith about 200mA bias gives VGS 1 volt IIRC....), maybe they compensate each other...

in the original F5 R1 and pot equates to 1k as well IIRC,

simulating with a single resistor gives a R24 value around 300 ohm
with my system you could use even a bigger value for R24 , I tried 2200Ohm
I think with too big a R24 there is the risk of too high impedance and less bandwith
and a sort of inbalance and stability problem between R24 and the current source.

I tried various solutions of current source keeping the cascode :
but with R24 =2200 (I could try again with 1k)
jfet: seemed hard to tune source resistor around 8.5 ohm very sensible to the value
and Jfet current source below 2 VGs off is not recommended, and they draw less current with rising temperature, witch is the opposite of stability

BJT: could be better, specially with a current mirror, I do not remember why I did not pursue this way, wanting to keep things very simple...

I allso tried a simple resistor between jfet and rail but then the cascode is reverse biased when lateral is off, did not like it....

so this is where I stand, with a good zener 15 v thermal drift should not be a problem, R7 is not too difficult to tune, I loose some of the avantages of the cascode, retaining the voltage drop... 15 volt zener should not be noisy as I read on another thread....

I was stuned by your design: why didn't I think of it!!!!.... but then again temperature compensation, I would like to retain the nice properties of laterals

so far it sims ok with 32v rails /4 ohm (8amp)... and my project beeing multiamplification I could trade bandwith for gain for the bass (below 300 Hz)
medium: B&G neo10 dipole 8 Ohm said to be purely resistive (nice driver!)
tweeter neo3 dipole

Voilà
Paul
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Old 16th June 2012, 09:52 PM   #15
Paulv is offline Paulv  France
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... and there is still the possibility to play with R2 and R3
increasing their value: lower Jfet bias but potentially more amp swing, am I right?

I have no experience with Jfets is it correct to say it's impossible to go beyond IDSS?
(vgs positive for a 2SK170)
Paul
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Old 17th June 2012, 10:08 AM   #16
AndrewT is offline AndrewT  Scotland
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jFETs do work with Id>Idss. But J Curl has forewarned us that the bias should not exceed the zero Vgs value and that only the music signal takes the jFET into the high current region on alternate half cycles.
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Old 17th June 2012, 01:43 PM   #17
Paulv is offline Paulv  France
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Thanks Andrew;
Fab: your design is probably the best solution, I will have a go at it (spice) with drain resistor to have a fairly constant dissipation. Vgs th: 5 V is very tempting!
did you built it?

cheers
Paul
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Old 18th June 2012, 01:02 AM   #18
fab is offline fab  Canada
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Quote:
Originally Posted by Paulv View Post
...
Fab: your design is probably the best solution, I will have a go at it (spice) with drain resistor to have a fairly constant dissipation. Vgs th: 5 V is very tempting!
did you built it?

cheers
Paul
Hi Paul

See F5 Semi-Turbo with Lateral Mosfets...

But this is the version w/o the cascode. The thermal compensation of the "p-mos" type mosfet can be adjusted with a thermistor as per my schematics (depending of the drain resistor value as you indicate) and do not forget the miller cap (you may add a zero by using an RC instead of the simple C...). This is the drawback of this follower stage compared to the original F5

I have not completed the project and switched to another one since there was not so much interest...at the time...so I have not listened to it. I have built the version of F5 meets Buzquito and it sounds better to my taste and other friends too than the original F5 I have built. Thus, this one may be interesting too with lateral mosfet... Anyway, I am glad you find it worthy of having a try out

Fab

Last edited by fab; 18th June 2012 at 01:08 AM.
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Old 18th June 2012, 04:26 PM   #19
Paulv is offline Paulv  France
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Default dreaming dreaming...

here are more thinking:
R7 and R10 to smooth dissipation in M3 and M4 (values to be determined with CISS rise with lower voltage across M3 and M4) advice welcomed

R14 and R16 with CTN to adjust bias independently of gain

R24 and R4 to choose / balance gain of devices

notice high value of R5: 47k! with C2 forms a low pass and seems to give very good results in LTSPICE on square signal 100kHz with C1 (much less noise on fft analysis and no overshot!)

I took M3 M4 IRF9640 IRF530 available in LTSPICE, I read with interrest f5-meets-buzquito and would like to find the best compromise: not obsolete, VGSoff>2volts, low power TO220?... and probably mount them on a small independant dissipator... R1 and R9 could be 100 ohm or more in a linear region.

as for OLG / NFB ... and linearity I am a newbee I do not know where to go!
and SPICE is not real life, shure we are all aiming for the best, that's the magic of this site!

cheers
Paul
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Old 18th June 2012, 08:18 PM   #20
Paulv is offline Paulv  France
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Default and the winner coul be:

main difference with -f5-meets-buzquito:
R14 R16, ( i like this trick!)
exact resistor values to be detrermined
with 2sk2013 2sj313 if I can get them
psu 32 volts plus 5 volts for drivers
and cascodes for jfets
thanks for your help
comments welcomed

cheers
Paul
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