F5X -- the EUVL Approach - The Build Thread

[NicMac]

Originally Posted by EUVL

4.4mA front end bias, in itself, is fine.

But since I expect you to get more bias current then Dave (who has the right value compared to theory), something is NOT right with your current PCB.
I have no idea what you have on your PCB and what not, it is impossible for me, or anyone, to do remote debugging for you.
For example if your outputs are connected to Gnd then the 55R feedback resistors are in parallel with the 11R, and your degen is then not 11R, but more like 9R1.

You have enough JFETs, so you can first test a JFET of roughly the same Idss offline and convince yourself what Id you should get with 11R degen.
And then you should go back to your PCB and find out if there are any discrepancies.

Have a go first.


Patrick

I'm still trying to troubleshoot this one......
I think it has something to do with the "grounded X" configuration that is recommended while setting up. When the "grounded X" jumpers are in (see post #9), the JFETs are biased differently as the outputs are grounded by the 220R resistor (R21/22) in this configuration.
Maybe Dave's JFET bias measurements were done in the "floating X" configuration

[EUVL]

No. Grounded X is fine for testing, as in 2x single ended.

The output resistors to ground will make little difference, as you essentially has a source resistor of 11R // (55R + 220R).
If anything the current should be more rather than less, since less degeneration.

As I said, satisfy yourself on a breadboard what current you should get with the degeneration resistor values.
Measure those values on the PCB to make sure they are as should be.
Trace to see where the current is "gone".
You can also verify the actual current by either the drain resistors (make sure you measure their values first before applying voltage).
Or use an ammeter.


Patrick

[pmchoong]

I have a few questions :

1) The BOM for the 'Mute' board states that there is one BAW 76 diode. Where do I solder this on? Please refer image 'Mute'.

2) For the input board connection to the main board, I will need to solder the joints as indicated in image 'input connection'. Are these connections correct?

3) As for the jumpers between Q7A and Q10A and Q11A and 14A, again please refer to the image 'jumper', is this correct?

4) What are the uses of these holes on the boards? Please refer to image 'holes'. I have soldered the source resistor without elevating them and so I was thinking of drilling a parallel holes beside these. Then I will connect a wire under the board from these holes to the source resistors so I would take measurement from there. if not, what other possible way to measure these resistors?

Thanks
PM Choong

[EUVL]

1) BAW76 goes to the RHS of the relay as in your photo. The cathode should face the positive side of the relay (i.e. diode normally off).

2) Yes, except that there are only 6 connections between the two boards. The one next to R10 is not connected to the main board.

3) Not correct. Please refer to Dave's instructions and schematics again. You can also see from your "holes" photo which 2 holes per Q7B and Q10B and Q11B and 14B have solder.

4) They are spare holes which have no use for you. You need to lift the power resistors off the PCB (at least 2~3mm), else your PCB will not last very long.


Hope this helps,
Patrick

[NicMac]

> BAW76 goes to the RHS of the relay as in your photo. The cathode should face the positive side of the relay (i.e. diode normally off).

What is the RHS?

> 2) Yes, except that there are only 6 connections between the two boards. The one next to R10 is not connected to the main board.

Do you mean the one connected to R101 on the input board? What is this hole for

Thanks!

Nic

[fitzfish]

Hi Nic, Patrick,

Originally Posted by NicMac

Maybe Dave's JFET bias measurements were done in the "floating X" configuration

Measured groundedX for the build article. Still had one of both configs available to test though so - Measures esentially the same either way. The current has to be going somewhere else as Patrick suggests or there is something wrong. Can you take at least one complementary pair of the JFETs out and do the simple Idss testing with an 11R resistor at 16V?

Originally Posted by NicMac

What is the RHS?

Right Hand Side

Originally Posted by NicMac

Do you mean the one connected to R101 on the input board? What is this hole for

That wire goes up to the mute relay board, not down to the main amplifier board.

Dave

[EUVL]

Thanks Dave.


Patrick

[NicMac]

Originally Posted by fitzfish

Can you take at least one complementary pair of the JFETs out and do the simple Idss testing with an 11R resistor at 16V?

Yesterday evening I build a test-circuit to do these measurements (and others) and I have now collected data.
In fact, I think I have found at least part of the explanation. The Idss values measured using the tracer (locky_z) are about 1 mA higher than what I measure with a "classical" method using the circuit you/Patrick presented in one of the first posts and a good DMM.
The difference is in terms of absolute values, not in term of relative values, and considering the 1000 FETs I have measured and matched using the tracer data (+ in silico calculations) I am very happy to see it all fits very nicely.

Anyway, back to the amp:
The Idss of a similar FET without degeneration is 6.7 mA (7.9 according to tracer). After 11R degeneration the (measured) value is 5.2 mA. Better, but still about 0.5V off what I measure in the amp.
The current over the drain resistor(s) is about 10.2 mA, leaving me even more perplexed.........

[EUVL]

Me too .......



So in part my theory seems correct.
You have somehow a parallel current path where part of the drain current is "gone" ....


Patrick

[pmchoong]

Thanks.

Please see attached images.

1)Which side is the RHS? Is image 'Mute 1' or 'Mute 2'?
2)Please refer to image 'connection to Mute'. Is this connection correct? Do the other holes connect to the Mute board as well as indicated by the dotted lines?
3) i have raised the source resistor about 4-5mm above the board.

Thanks again.
PM Choong