F5X -- the EUVL Approach - The Build Thread - Page 25 - diyAudio
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Old 9th December 2012, 10:29 PM   #241
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Quote:
Originally Posted by NicMac View Post
Inputs are grounded. I'm using four different Rdeg's for the four J74's
Ah, taken to the next level...

Dave
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Old 10th December 2012, 04:08 AM   #242
EUVL is offline EUVL  Europe
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4.4mA front end bias, in itself, is fine.

But since I expect you to get more bias current then Dave (who has the right value compared to theory), something is NOT right with your current PCB.
I have no idea what you have on your PCB and what not, it is impossible for me, or anyone, to do remote debugging for you.
For example if your outputs are connected to Gnd then the 55R feedback resistors are in parallel with the 11R, and your degen is then not 11R, but more like 9R1.

You have enough JFETs, so you can first test a JFET of roughly the same Idss offline and convince yourself what Id you should get with 11R degen.
And then you should go back to your PCB and find out if there are any discrepancies.

Have a go first.


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Old 10th December 2012, 08:15 AM   #243
NicMac is offline NicMac  Italy
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The PCB is stuffed exactly according to Dave's careful instructions in this thread. Everything is in there according to F5X BOM including protection circuit, but not output devices, cascode circuit, and mute PCB. Probably exactly the same components as other 15+ F5X builders will be using soon (or already did)...
Inputs, but not outputs, are grounded.
I measure 10R5 over the 11R blocks, but do not recall the values measured for the individual matched 33R resistors used here.

Of course I can measure similar FETs with 11R degen - and will do so.
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Old 10th December 2012, 08:39 AM   #244
EUVL is offline EUVL  Europe
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The attached is the Id vs. Vgs measurement of a 2SK170BL with 7.9mA Idss from my own collection.
The measurement was made using calibrated equipment (0.1% reference resistors, etc.)

I have checked the measurement data myself to find out what Id one should get for 11R degeneration.
The result is 5.85mA, giving a Vgs of -64.2mA.

I am 99% sure there is nothing wrong with the PCB layout, since 3 people have built fully working amps with them.
I cannot rule out individual board errors for your GB boards, since I have never seen them, and they didn't come from us.
But then it would not be so difficult to spot. And Dave used the same boards.

Perhaps you could also check your Idss and Yfs measurements.


Patrick
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File Type: png 2SK170BL 7.9mA.png (17.5 KB, 434 views)
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Old 10th December 2012, 09:34 AM   #245
NicMac is offline NicMac  Italy
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Thank you for taking the time to look at it. I do agree with your estimate.
Below is the experimental curve (measured, black) and 11R degenerated curve (calculated, blue) for one of the 7.9 mA K170 actually on the PCB.
The calculated Idss after 11R degeneration is 5.75 mA and the difference from your result (0.1mA) may well be accounted for by different Yfs between our K170's.

I'm sure that there is nothing wrong with the boards and I did take much care in stuffing these. Whatever the reason for the discrepancy it seems very constant as I basically get the exact same readings in all 8 sections. So unlikely to be a stupid solder bridge or something like this.

As far as I can see the only difference between Dave and my PCB's is that I have in the protection circuit.

Of course I will also have to check the absolute accuracy of my Id/Yfs measurements.
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File Type: png 443R11deg.png (16.1 KB, 425 views)
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Old 10th December 2012, 09:53 AM   #246
EUVL is offline EUVL  Europe
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I can only suggest you try to figure out where else can the current be going.
Also you can use an ammeter in series with your lab supply to check the actual current consumption.

You know from your own curve that your bias should be about 5.8mA and not 4.4mA.


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Old 10th December 2012, 10:00 AM   #247
NicMac is offline NicMac  Italy
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Ok. I will investigate.
I don't know if pertinent, but although not deliberately grounded I do measure 29R between GND and all four outputs (+ and -, on both boards).
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Old 15th December 2012, 11:27 AM   #248
ashaw is offline ashaw  Australia
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OK, I will over the next few posts discuss an initial test procedure. The first test in the test procedure is to test the power supplies.

Pin 2 of U15 is at ground potential and pin 1 of u15 houlf be at +12V, pin 2 fo U14 should be at +24V when the power is on. pin 2 of U12 should be at 5V.

There should be less than 5-10mV of ripple on these rails.
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Old 15th December 2012, 11:41 AM   #249
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Next you should test the Differential amplifier. We first need to test the differential performance of the amplifier. To do so put a 3V lithium battery across the terminals at pin 3,4 of P5 and 6. When you do so pin1 of U5 should be asserted high.

secondly when you tie 3+4 of P5/P6 together and touch +24 and Ground you should not see U5 asserted. in either case.
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Old 15th December 2012, 11:53 AM   #250
NicMac is offline NicMac  Italy
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good to see you are back on it ashaw
Could you please also comment on the component questions in post #226 and if the delivered HJ4002 part is equivalent to the 74HC4002 part in the BOM.

I guess having the right components on the board before testing is important
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