Bias going up automatically
I am building F5T turbo v2 version.
After a number of turns on the pots I got the Bias to 260 mv with dc offset of 20mv. I let it cook for some time may be half hour I see bias at 310 mv. then I switched it off. Is there some thing wrong here.
Is it common for bias to go up some millivolts. If so by how much would be limit.
Thanks
pandu
I am building F5T turbo v2 version.
After a number of turns on the pots I got the Bias to 260 mv with dc offset of 20mv. I let it cook for some time may be half hour I see bias at 310 mv. then I switched it off. Is there some thing wrong here.
Is it common for bias to go up some millivolts. If so by how much would be limit.
Thanks
pandu
I was thinking and looking into leaving class A article... You bias transistors more to stay in class A longer, so your bias determines output current in class A. My question is what about minimum bias per device if you have multiple ones? Can you go up in number of outputs lowering bias per device but having the same(or even higher) total value? Is there a best spot? Or you can increase number of outputs until their capacitance kicks in and increase HF distortions?
This question has been asked of Nelson. One major advantage of bias spread over a number of devices is that the ibdividual fets iperate at a lower internal temp even though the cumulative heat may be higher. It would seem to allow for much greater safety margin in overall sink tempetature. Also, multipke parallel fets sum to higher overall YFS, which i believe, reduces somewhat, the effect of Crs, as less current is needed. Seems like a good idea, to me.
.
As I am learning and trying to understand the last 4 post, so feel free to correct me if I am wrong. But biasing the outputs lower across more outputs, would you then be reducing current across the fets reducing operating tempature, thus not needing as much heat sink. This might be exactly what buzz said, but I have to explain back to make sure I fully understand.
Almost. Each fet will operate at a lower individual temperature, but the total dissipation may be the same, epending on your choices. In other words, V2 biased @ 1A/fet vs V3 biased @ .5A/fet. Total dissipation is the same, but each fet is contributing less to that total and in theory has a little more safety margin as well as longer life. Also wonder about memory distortion, but that is VooDoo.
F5T v2 up and running
First of all I need to thank Nelson pass, DIYAUDIO pass club forum, Omishra who formulated Group buy
After a long preparation, research I am done with F5T v2. Currently both the channels are biased at 320mv. I have tested with my old take 5 speaker they are sounding nice. Need to test it on my paradigm signature s4. I am seeing dc offset varying between -30 to +30 mv. What are the limits of dc offset. what dc offset is bad for a speaker.
let me know
Thanks
pandu
First of all I need to thank Nelson pass, DIYAUDIO pass club forum, Omishra who formulated Group buy
After a long preparation, research I am done with F5T v2. Currently both the channels are biased at 320mv. I have tested with my old take 5 speaker they are sounding nice. Need to test it on my paradigm signature s4. I am seeing dc offset varying between -30 to +30 mv. What are the limits of dc offset. what dc offset is bad for a speaker.
let me know
Thanks
pandu
Id of the upper and lower FETs is completely dependant on the Vgs of the relevant devices.
Low Output Offset (OO) requires the upper and lower current to almost exactly match.
This close matching of currents is very easily unbalanced by very small changes in Vgs for either, or both, of the upper and lower devices.
It would take a small wind/draught blowing over the heatsink for these critical Vgs values to be varied differentially.
This is why the OO varies, small changes in heatsink temperatures. The Thermistors are too slow to respond.
Low Output Offset (OO) requires the upper and lower current to almost exactly match.
This close matching of currents is very easily unbalanced by very small changes in Vgs for either, or both, of the upper and lower devices.
It would take a small wind/draught blowing over the heatsink for these critical Vgs values to be varied differentially.
This is why the OO varies, small changes in heatsink temperatures. The Thermistors are too slow to respond.
Bias is pretty much stable with 10 mv variation after attaining temperature.
dc offset
Yes the dc offset measurement is with no signal.
When I switched on the amp early this morning, when amp was dead cold its dc offsets measured 90mv. Over a period of half hour to one hour one of the channels dc offset came down to 10mv But the other one came down to 50mv and stayed there.
For now I readjusted the bias on the second channel made the dc offset to less than 10mv.
Is it normal to have higher dc offset when the amp is cold. If that is the case is it ok to run the speakers when the amp is cold.
Thanks
Pandu
Yes the dc offset measurement is with no signal.
When I switched on the amp early this morning, when amp was dead cold its dc offsets measured 90mv. Over a period of half hour to one hour one of the channels dc offset came down to 10mv But the other one came down to 50mv and stayed there.
For now I readjusted the bias on the second channel made the dc offset to less than 10mv.
Is it normal to have higher dc offset when the amp is cold. If that is the case is it ok to run the speakers when the amp is cold.
Thanks
Pandu
You should have a shorted input before measuring offset.
The way this topology works means the offset varies slightly with operating temperature. There are some pointers on the original F5 thread. The offset is caused by slight differences in the operating point between the top and bottom halves of the circuit, as Andrew as has already answered to you.
Basically the output devices conduct and warm up, then the thermistor tracks them and reduces the bias. It is sort of thermal feedback, and goes on till thermal equilibrium is reached. As this happens on each tracked transistor, the two halves are always conducting slightly differently. This means the offset will vary a bit as the amp reaches operating point. How much depends on the build and how well the thermistors are coupled to the outputs, and how much heatsink you have.
It is possible to have a far more stable offset by removing the thermistors completely (at least, it was in the F5) but the penalty for that is the amp needs to be rebiased as the ambient temps change (for example, summer vs. winter) since there is no external reference. I did that for my first F5 because it was always meant to be a winter amp. Nelson also notes in the F5 manual that the amp takes longer to warm up and reach operating point with no thermistors. I see no issues with that given that we run in a very hot climate compared to a lot of guys on the forum.
The way this topology works means the offset varies slightly with operating temperature. There are some pointers on the original F5 thread. The offset is caused by slight differences in the operating point between the top and bottom halves of the circuit, as Andrew as has already answered to you.
Basically the output devices conduct and warm up, then the thermistor tracks them and reduces the bias. It is sort of thermal feedback, and goes on till thermal equilibrium is reached. As this happens on each tracked transistor, the two halves are always conducting slightly differently. This means the offset will vary a bit as the amp reaches operating point. How much depends on the build and how well the thermistors are coupled to the outputs, and how much heatsink you have.
It is possible to have a far more stable offset by removing the thermistors completely (at least, it was in the F5) but the penalty for that is the amp needs to be rebiased as the ambient temps change (for example, summer vs. winter) since there is no external reference. I did that for my first F5 because it was always meant to be a winter amp. Nelson also notes in the F5 manual that the amp takes longer to warm up and reach operating point with no thermistors. I see no issues with that given that we run in a very hot climate compared to a lot of guys on the forum.
what do you mean shorted input.
the ntcs are close to the transistors not attached. does it matter here. because a ntc can be close to the transistor and other can be little farther.
Few mm difference in the ntcs spacing with teh mosfet can make the temperature difference significant.