F5 Turbo Builders Thread

[Zen Mod]

fix

first

solder

last

[lhquam]

Originally Posted by buzzforb

...

The burn happened in just a second or two, so it seems obvious it was thermally based runway. My suspicions are the diode temperature. By bringing the diodes to the sink temp, you leave yourself with less leeway in terms of temp variation. The likelihood of constant pushing into diode territory, except on extreme transients is not high. If they are adequately heatsinked of the main sinks, I don't see them having a problem. I will watch with temp probe this time.

Same board as post 313

I am not sure about the thermal runaway theory. The thermal mass of the heatsink would not permit thermal runaway within a second or two. I suspect something else. How are you attaching your thermistors? I burned up fets on my first build due to a thermistor shorting to the drain lead of a MOSFET.

[buzzforb]

Originally Posted by Zen Mod

fix

first

solder

last

THis is the current path. I had created tension that was lifting the fet slighlty at that lower end. All fets and diodes will be mounted first and then soldered. THe thermistors are underneath the board and free from contact with anything but the heatsink. They are bent out and when the board is placed, it creates a natural spring tension on them. It is still my beief that seperating the diodes from the heat of the sinks is a good idea.

[buzzforb]

Originally Posted by noSmoking

Hi Buzz,
Luck has been with me lately not burned up nothing,The new resistors don't smoke much ,lol,you got to put the meter on them to see if their toast,lol,they used to smoke and burn,I have seen some weird caps explode or just speeewww!They are a mess to clean up too,
So on a serious side are the diodes MUR3020wt used as a current source or more like a limiter,I guess I don't understand their benefit,could you explain?
Thanks,
NS

Simplest explanation is thta they act sort of like a bypass cap you see in tube amps. Shorting the signal to the ground and increasing available gain. Difference is, that they also have an affect on DC bias, since they entire AC signal is not shorted. Sliding bias is a term that has been thrown around. Perhaps a more astute member could give a more thorough explanation.

[Zen Mod]

Originally Posted by buzzforb

THis is the current path. I had created tension that was lifting the fet slighlty at that lower end. All fets and diodes will be mounted first and then soldered. THe thermistors are underneath the board and free from contact with anything but the heatsink. They are bent out and when the board is placed, it creates a natural spring tension on them. It is still my beief that seperating the diodes from the heat of the sinks is a good idea.

interesting-nobody asked Papa to give us pic of his F5T ;

that will give us insight how he addressed that issue - diodes on sink , or not

[buzzforb]

He said he only officially built V1. Probably loosely asssmebled on test sinks or something. I am probably wrong, but even Jacco recommended them on seperate sinks, suggesting the exponential portion of the diode curve is more greatly affectd by the temp than anything else. Adequate heatsinking is hard thing for DIY member.

EDit:
PLease defer to Nelson and ZM, I trust them a great deal more than myself when it comes to this sort of thing.

[CeeVee]

Originally Posted by Zen Mod

interesting-nobody asked Papa to give us pic of his F5T ;

that will give us insight how he addressed that issue - diodes on sink , or not

Now that ! crossed my mind yesterday while trying to design a separate heatsinking arrangement for my contraption mounting of boards.

I seem to remember reading somewhere on the beginning of the F5T thread that diodes should track thermal working profile of the Transistors they couple with ?!

But apart from not being sure ...this practical evidence also would advise against that ...

Your thoughts on that ZM ?.....and don't say you don't have any !!!

[buzzforb]

I can see thermal tracking of the fets if the result was bias containment, sort of like thermistors, but if tracking results in bias increase? ZM is absolutely right in one regard. Nelson would not release this unless it was thoroughly tested. I simply suggest very attentative heatsinking. In my V3 build, I will have 4 fets within a 160mm of each other. That is a lot of heat to get rid of.

[CeeVee]

Originally Posted by buzzforb

I can see thermal tracking of the fets if the result was bias containment, sort of like thermistors, but if tracking results in bias increase? ZM is absolutely right in one regard. Nelson would not release this unless it was thoroughly tested. I simply suggest very attentative heatsinking. In my V3 build, I will have 4 fets within a 160mm of each other. That is a lot of heat to get rid of.

Agree on all counts, i like to 3d simulate my builds exactly to try to avoid unpleasant surprises even my first " by the book " F5 was done like that and worked like a charm first time...

Lets see what mighty ZM thinks.....( getting that sinking feeling that he's going to tell me that he doesn't ...heheh ).

[Zen Mod]

1. see how Papa made that ( and he made it , even if he didn't made superduper V3)

2. if not 1. , just put them on main sinks with mosfets

reason for #2 is - if you don't know how , just let them bleed .......