F5 Turbo Builders Thread

[jacco vermeulen]

Originally Posted by Bksabath

regarding this

Primary target of the PS capacitors is to increase S/N of the amp.
Secondary one is enabling the amp to reach the most continuous power at a target impedance, ripple lowers the usable range of the rail voltage.
Third is to stock ample energy for short bursts, when the transformer is not delivering or can't deliver enough juice.

No 1 is a reason why Class A amps need a larger cap reservoir : higher bias level means higher ripple level at zero output current.
No 2 is important for power amps which are required to deliver a lot of power in 4 Ohm and lower impedances.

For one and two, total uF size of the capacitors is the main theme.
For the third category, total energy of the capacitor bank is the important parameter.

Those two are not the same.
Think a balanced/bridged amp, compared to a regular one that delivers the same power.
For the same bias level, each half of the bridged amp requires the same uF number as the straight amp does, for identical ripple level.
Ideally, rail voltages of the bridged amp are however half the number of the ones in the normal power amplifier.
Total energy of the caps is proportional to squared voltage level, so a bridged power amp would require 4 times the cap size of the basic amp, at half the voltage rating (ideally).

CRC is a good one to drop ripple, more efficient than C+C.
For peak output level, CRC is less favorable.
Prettiest for a high bias turbo is a choke PS. For a reference, see e.g. Mr Gerhard Cerubin monster amp at the MPP thread.
For peak current delivery, also think a large bank of motor run caps (reference : PBN Olympia from Denmark)

For a quicky estimate of PS cap size, pick a ripple number and desired impedance : C number rolls out of mains frequency, impedance, output voltage and associated current.

[Bksabath]

Tanks Jacco

I could not have put this on paper any better (but you all know that)

Now for the Mechanical side of things ...

First one AC V
2 and 3 DC offset I have seen beter than that once is warm
No cheating (I newer do) meter give min and max V and if you look range is same for pictures taken same time apart.

This is what you get with 150mU on CRCLC

[Bksabath]

Jacco realy great to see you here

Could you please give me (and those interested) a run down regarding the use of mosfets with Ciss of 2550pF (P chanell)Gfs 19 S and 1250pF (N channell) Gfs 20 S
compared to 920pF (P channell) Gfs 6.6 S and 1200pF (N canell) Gfs14.5 S?

Plan is to stick 4 of those in parralell
Transconductance looks close for top pair beter than second?
Many Tanks

[Bksabath]

About dinamic range
1 whole minute of the New Cold Play CD at enoug volume to fill bass on tummy.

Range = pup (crapp with explosive duble p at end would not do)

[ungie]

Originally Posted by Bksabath

About dinamic range
1 whole minute of the New Cold Play CD at enoug volume to fill bass on tummy.

Range = pup (crapp with explosive duble p at end would not do)

It's always interesting, and enlightening, to see what the actual power requirements are for music. The problem is that when you hit a big peak, and it comes within a frequency range where your speakers are at their impedance minimum or high phase angle, you want as much power available as possible. I think that this F5 Turbo v3 at 100W Class A/8ohms, 200W Class AB/4ohms is going to be perfect for the majority of people out there!

[Bksabath]

Yes agree on that
Pano tread can give same enlightment.A Test. How much Voltage (power) do your speakers need?


That was a CD I was going to post Classical viniyl with pre pot at same position and maybe same 1970 Blues to get a taste of difference

But She came back from shopping and it was going to be to loud
Later

[Daniel(Del)]

Hi all!

I have some 2SK1530/2SJ201 pairs here and while they aren't exactly matched, their Vgs are within 100mV range. Most of them has higher value though. Is it ok to use them to build F5 Turbo?

And also, I couldn't understand how thermal runaway is prevented on this design. Can someone please explain me?

Many thanks
Daniel

[Daniel(Del)]

Originally Posted by Daniel(Del)

Hi all!

I have some 2SK1530/2SJ201 pairs here and while they aren't exactly matched, their Vgs are within 100mV range. Most of them has higher value though. Is it ok to use them to build F5 Turbo?

And also, I couldn't understand how thermal runaway is prevented on this design. Can someone please explain me?

Many thanks
Daniel

Nevermind, I've just noticed the thermistors preventing thermal runaway.

[jacco vermeulen]

Originally Posted by Bksabath

mosfets with Ciss

For a power amp to reach a desired bandwidth, voltage is required to rise fast enough, which leads to rise-time, the time it takes to do 90% Vpp.
Combined with the peak output voltage of the amp leads to the slew rate figure, volts per second.
To get there, the input capacitance of the output device gate has to be (dis)charged fast enough.

Capacitance is amps time seconds, per volt : C = A *s / V
Tossed around : C * V/s = A
Slew rate is volts per (micro)second, V/s.
So : required drive current of the gates = input capacitance times slew rate.

Again : C = A *s/V => C = A/V * s
Transconductance : A/V
Means that for a given output stage, charging half the input capacitance leads to half the output current.

Regular output stage is a source follower (aka common drain), signal in at gate, signal out at source.
Ciss = cgs + Cgd

If you double the number of output devices in a source follower output stage, the drive current may charge the capacitance half only.
But as the output devices number is doubled, output current will be the same: 1/2 times 2 is 1.

So for a single device, the input capacitance to drive is Cgs + Cgd.
For two devices : Cgs + Cgd + Cgd

If you look at the F5, it's signal in at the gate, signal out at the drain.
Implies that it's a different drive than a source follower.
Or as papa says : 800KHz with 2 pairs, 80KHz with 20 pairs (85Khz, due to 1 time Vgd)

Different also is that the N-channel JFET handles both the charge and discharge of the P-channel output device(s), same thing on the other side.
(upside is that the bias current of the input stage is used twice, the driver in a regular output stage has to charge/discharge the gate of both P- and N-channel)
Which is why each half has it's own steering system.

Recall C = A/V * s and gm = A/V
Means that the weakest half sets the pace.
In this case, it's the FQA12P20, 544 pF/A/V
(4 times Vgs plus 1 time Vgd, divided by a transconductance of 6.6 A/V)

Me bit distracted by UKtoecutter's board

[UKToecutter]

Originally Posted by jacco vermeulen

Me bit distracted by UKtoecutter's board

What does that mean?????