I built a pair of mono F5V3 with separate power supply boxes. There are photos of one of the supplies in post 4763. F5 Turbo Builders Thread
I put the rectifiers on the floor of the chassis right between the transformer and the first Cap bank in the CLC power supply. The cap bank is upside down with the pc board bottom facing up for easy connections and it’s also under the black insulator for safety. Shorting out a +-45volt power supply with 2 30mh chokes and almost half a farad of capacitance is not something that will make my day.
I put the rectifiers on the floor of the chassis right between the transformer and the first Cap bank in the CLC power supply. The cap bank is upside down with the pc board bottom facing up for easy connections and it’s also under the black insulator for safety. Shorting out a +-45volt power supply with 2 30mh chokes and almost half a farad of capacitance is not something that will make my day.
Ordered this CRC Power Supply PCB for DIY F5 TURBO First Watt class A Power amplifiers | eBay
Is my part list is OK for F5 (simple, not turbo)? Or maybe someone will advice another options? 400VA 18V+0+18V+0
C1..C8 = United Chemi-Con 12000uF 63V ESMH630VNN123MA45T 6.2A ESR 21 mOhms
C9, C10 = 0.10UF 100VDC 10% 5mm MKP2
R1..R8 = PANASONIC 0.47 OHM R47 3W +/-5% METAL OXIDE RESISTOR
Maybe for C9-C10 shoud pick up WIMA MKP 0.15UF 63V 5% 5mm MKP2 instead of 0.10UF 250V 5% 5mm MKP2?
Thanks for all replies.
Is my part list is OK for F5 (simple, not turbo)? Or maybe someone will advice another options? 400VA 18V+0+18V+0
C1..C8 = United Chemi-Con 12000uF 63V ESMH630VNN123MA45T 6.2A ESR 21 mOhms
C9, C10 = 0.10UF 100VDC 10% 5mm MKP2
R1..R8 = PANASONIC 0.47 OHM R47 3W +/-5% METAL OXIDE RESISTOR
Maybe for C9-C10 shoud pick up WIMA MKP 0.15UF 63V 5% 5mm MKP2 instead of 0.10UF 250V 5% 5mm MKP2?
Thanks for all replies.
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No need for 63V electrolytics for a standard F5. 35V will do nicely. (That will also allow you to move up to 15,000 or 22,000uF for less money, which will reduce the ripple and the ESR.)
Similarly, the lower voltage MKP2 will do nicely. 0.10uF vs 0.15uF won't make any difference in this application.
Cheers,
Jeff.
Similarly, the lower voltage MKP2 will do nicely. 0.10uF vs 0.15uF won't make any difference in this application.
Cheers,
Jeff.
Thank you! So Cornell Dubilier - CDE SLPX223M035H4P3 35 VDC 22000uF 6.38A, ESR 24 mOhms must be better even for lower price. And WIMA MKP 0.15UF 63V 5% 5mm MKP2.
Metal film with 300ppm/C is terrible.
What have Panasonic done to get metal film to perform that badly?
We have come to expect metal film to have a tempco of 25ppm/C to 100ppm/C
a typical low cost 1% 600mW metal film will have a tempco of 50ppm/C and cost less than 2pence (3cents).
so it's a Mouser error. Three times in that link they state "metal film".
Yes, 300ppm/C is typical of metal oxide.
He he... never say "final".
Have you used PSUD2 yet? Now would be a great time to learn it; it's pretty easy. It'll allow you to check your transformer current draw, your ripple current into the first two caps, and your power dissipation over your resistors.
Mock up your power supply and post your .psu file here and we'd be happy to check it over for you.
Those resistors are wire-wound, which have some inductance. Where you're using them I think that's fine (after all, a CLC filter is a bunch of inductance with some resistance). Just be wary of using those in other places.
the 5W wire-wounds I have opened up have typically between 3turns and 5turns on a ~2.5mm diameter ceramic core.
The added inductance of those few, small diameter turns can generally be ignored in our audio amplifiers.
The length of the resistor and it's leads amounts to ~ 50% of total inductance.
The added inductance of those few, small diameter turns can generally be ignored in our audio amplifiers.
The length of the resistor and it's leads amounts to ~ 50% of total inductance.
When you hover the mouse over a section, the whole vertical slice highlights. You can then right click and delete or change the section, or insert a new section in front of it.
As you move the mouse around, it will also highlight smaller rectangles around the individual components. Again, right clicking allows you to edit their values.
You need to set the transformer voltage at its free-load voltage. If you don't know what that is for yours, use 19.8V (that's what mine reads).
After clicking the simulate button you'll get values for the current and voltage over the various components.
Note that each stage assumes a single capacitor, resistor, whatever. So in your case with 33,000uF/12mOhm caps, you'll want to enter 66,000uF/6mOhm.
As you move the mouse around, it will also highlight smaller rectangles around the individual components. Again, right clicking allows you to edit their values.
You need to set the transformer voltage at its free-load voltage. If you don't know what that is for yours, use 19.8V (that's what mine reads).
After clicking the simulate button you'll get values for the current and voltage over the various components.
Note that each stage assumes a single capacitor, resistor, whatever. So in your case with 33,000uF/12mOhm caps, you'll want to enter 66,000uF/6mOhm.
Can't get sufficient bias for F5TV2
Hi all,
I wonder if this is OK to join this thread just by jumping in from the side line. The F5 subject is a bit drying out but still I would much appreciate getting some advise on a Problem which I have seen being treated here before but not exactly answered such, that it fits my Problem:
I am building a V2 all the way as described in the build guide of 6L6 with the only exception of using a rail voltage of about 40V idle. I am trying to set the bias and it feels exactly as described in the guide (1 turn left and then 1 turn right) but at about Iq=240...280mA/device I am running out of turns. The MOSFET's as well as the MUR's are getting reasonably warm seemingly adequate to the bias. DC offset can be controlled "per the book" down to 0mV. Haven't tried to apply the signal generator but touching the input contact with my fingers gives me a hum at the output as expected.
What am I dowing wrong????
Does the 40V rail require to change some component values? Do I need to increase R5/R6 in order to extend range of P1/P2?
Any other component to be changed?
Did anyone take the trouble to generate a chart with test points and recommended values??
Any questions from anyones side?
Any good suggestion more than welcome!!!!
Hi all,
I wonder if this is OK to join this thread just by jumping in from the side line. The F5 subject is a bit drying out but still I would much appreciate getting some advise on a Problem which I have seen being treated here before but not exactly answered such, that it fits my Problem:
I am building a V2 all the way as described in the build guide of 6L6 with the only exception of using a rail voltage of about 40V idle. I am trying to set the bias and it feels exactly as described in the guide (1 turn left and then 1 turn right) but at about Iq=240...280mA/device I am running out of turns. The MOSFET's as well as the MUR's are getting reasonably warm seemingly adequate to the bias. DC offset can be controlled "per the book" down to 0mV. Haven't tried to apply the signal generator but touching the input contact with my fingers gives me a hum at the output as expected.
What am I dowing wrong????
Does the 40V rail require to change some component values? Do I need to increase R5/R6 in order to extend range of P1/P2?
Any other component to be changed?
Did anyone take the trouble to generate a chart with test points and recommended values??
Any questions from anyones side?
Any good suggestion more than welcome!!!!
the input jFET allows current to pass through the drain load from the supply rail.
The voltage drop across the drain load is determined by the current passing to the jFET and the effective resistance of the various resistors that form the drain load.
The output stage turns on when Vgs is raised above an unknown threshold.
You need to get the Vdrop high enough to reach and then exceed that Vgs for the current you want to bias at.
You have TWO controls: the resistances and the jFET current.
Increase the resistances and/or increase the jFET current.
The voltage drop across the drain load is determined by the current passing to the jFET and the effective resistance of the various resistors that form the drain load.
The output stage turns on when Vgs is raised above an unknown threshold.
You need to get the Vdrop high enough to reach and then exceed that Vgs for the current you want to bias at.
You have TWO controls: the resistances and the jFET current.
Increase the resistances and/or increase the jFET current.