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Old 8th November 2011, 03:57 AM   #1
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Default bias current ?'s

in the solid state fourm, the question was presented about sound of bpt mosfets etc in class a.
it was pointed out again more current bias in a mosfet is good.
made me wonder. what is the point of no b getting better.
llike a dimmer switch you want it in the middle. so you can get brighter and dimmer.. to much bias and you wont get a full swing.
so my question is......what is the best.
if the fet is 10 amp should you aim for 5amps?
or is there a sweet spot with each brand, type, of fet. if so what is that called? is it in the spec sheet?

all of this is pretending heat etc dosent matter.

hope im not being to ignorant.

also please forgive spelling, i cant check using my phone.
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Old 8th November 2011, 07:03 AM   #2
nar is offline nar
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Quote:
Originally Posted by sakellogg View Post
in the solid state fourm, the question was presented about sound of bpt mosfets etc in class a.
it was pointed out again more current bias in a mosfet is good.
made me wonder. what is the point of no b getting better.
llike a dimmer switch you want it in the middle. so you can get brighter and dimmer.. to much bias and you wont get a full swing.
so my question is......what is the best.
if the fet is 10 amp should you aim for 5amps?
or is there a sweet spot with each brand, type, of fet. if so what is that called? is it in the spec sheet?

all of this is pretending heat etc dosent matter.

hope im not being to ignorant.

also please forgive spelling, i cant check using my phone.
Rather than said above raw current, the thing that counts when biasing a device is the power it can handle.
P= UI, so you have to be sure you don't break too much the SOA limit ( Safe Operating Area ). For current TO247 devices, Nelson states to get them running at about 30W max each.

This is close to the limit chosen by the master himself for the Aleph_J, good example; the last of the Aleph series, with a double jfet as front end. I'm currently upgrading my Aleph_4 to get this jfet build running. If you look closer, intended bias is 1,15A per device, on 24V rails it means roughly 28W per device. Nelson used 2 output devices / 2 CCS power mosfets IRFP240, each device handling about 30W.

After this limit, depending on heatsinking arrangement and thermal losses ( Mica / Sil Pads / Keratherm, torque applied to the Mosfets, thermal conductivity issues, etc) you can't be sure the inner temp of the device is cool enough. Too high temp reduces lifespan of your project. That said, the higher the bias, at the point your heatsinks can handle, often the better the sound is

The sweep spot exists in all devices. Most of the time it is not predictable however, won't show up clearly in the datasheet, so you'll have to trial & error to find this particular point. Doing so, it is better to cross check measurements and sonic results. This is where mastering a design becomes difficult for most of us here

Best,

nAr
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Last edited by nar; 8th November 2011 at 07:13 AM.
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Old 8th November 2011, 07:09 AM   #3
Zen Mod is offline Zen Mod  Serbia
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just go to Pass and/or First Watt site , download all pdfs and read

Papa already gave more details and insights in subject , than we can write here in a month

anyway - shortly from praxis here in Papaland :

more bias is better
dissipation per device in range of up to 25W ( usually ) to 50W ( for brave ones )
be sure that heatsinking is good/sufficient (interface between part and hsink also very imortant ) to keep things no hotter than 55C on hottest outer part of hsink

edit : Nar was faster .... but I'm still dumbest around
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Old 8th November 2011, 07:15 AM   #4
nar is offline nar
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Quote:
Originally Posted by Zen Mod View Post
just go to Pass and/or First Watt site , download all pdfs and read

Papa already gave more details and insights in subject , than we can write here in a month

anyway - shortly from praxis here in Papaland :

more bias is better
dissipation per device in range of up to 25W ( usually ) to 50W ( for brave ones )
be sure that heatsinking is good/sufficient (interface between part and hsink also very imortant ) to keep things no hotter than 55C on hottest outer part of hsink

edit : Nar was faster .... but I'm still dumbest around
Faster, but edited his own post
Reason : adding some more lines ...

Best,

nAr
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Old 9th November 2011, 10:14 PM   #5
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zen nar thanks.

zen i have been slowly reading all of the stuff ive downloaded.
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Old 10th November 2011, 01:13 AM   #6
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I have not encountered a case where more bias did not improve Mosfet
performance, at least until the devices died...

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Old 10th November 2011, 03:25 AM   #7
dmsims is offline dmsims  United Kingdom
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Quote:
Originally Posted by nar View Post
Sil Pads applied to the Mosfets
Does anyone use those on Mosfets ?
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Old 10th November 2011, 01:43 PM   #8
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We use them at PL. I use mica and grease on FW. The difference is that
PL uses tons of devices, and FW uses fewer and works them harder.

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Old 10th November 2011, 02:19 PM   #9
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Quote:
Originally Posted by Nelson Pass View Post
I have not encountered a case where more bias did not improve Mosfet
performance, at least until the devices died...

thank you, all of you.

now, if i could ask why?

is it the heating up of the simiconductor stuff on the die or is it the extra current that it provides for the cir?
or somthing else i havent thought of.

for example 10 mosfets at .5A sound the same as 5 mosfets at 1A

is it the indaviduual devices or total?

thanks.
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Old 11th November 2011, 05:15 PM   #10
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Fundamentally, the transconductance becomes higher with current and the
non-linearity of the transconductance becomes a lower percentage of
signal current. The gain or damping factor gets higher and the distortion
gets lower.

Also, chicks dig it.

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