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Old 14th May 2013, 10:38 PM   #951
generg is offline generg  Germany
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Quote:
Originally Posted by pidesd View Post
i meant regarding the way to arrange the capacitors driving the gates of the parallel mosfets of output stage...unless i read you falsly, buzzborb
I had the impression Nelson took in the BA-2 the 10uF/1000uF solution to allow people to take for the 10uF a "better" foil cap than an electrolytic cap.

The 1000uF is so big to reduce the turning on plopp!

The 10uF are sufficient for the audio purpose 20-20.000Hz
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Old 14th May 2013, 10:40 PM   #952
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buzz,

if they are close enough, i guess they dont matter much in the final picture

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Old 14th May 2013, 10:49 PM   #953
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What difference do you see?
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Old 14th May 2013, 10:49 PM   #954
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Quote:
Originally Posted by buzzforb View Post
Can you f^6 coupling as well as bringing back some to input like other Fusy amps.?
clarify

Quote:
Originally Posted by pidesd View Post
......


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Old 14th May 2013, 10:51 PM   #955
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Never mind. I will just try it.
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Old 19th May 2013, 03:32 PM   #956
kp93300 is offline kp93300  Malaysia
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Hi some quick questions.

Can i use BA 3 front end as a preamp?
Is it possible to decrease the gain to about 3X ?
I am interested in this circuit as i like the idea of varying the 2nd / 3rd harmonic content .

thanks

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Old 19th May 2013, 03:35 PM   #957
Zen Mod is offline Zen Mod  Serbia
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yes

read original article ( here , in article section ) , along with my comment - edited Pa's explanation of circuit , with fixed part's nomenclature

Burning Amplifier BA-3
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Old 19th May 2013, 03:37 PM   #958
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You can turn down the gain? Cool!
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Old 20th May 2013, 08:50 AM   #959
kp93300 is offline kp93300  Malaysia
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Quote:
Originally Posted by Zen Mod View Post
yes

read original article ( here , in article section ) , along with my comment - edited Pa's explanation of circuit , with fixed part's nomenclature

Burning Amplifier BA-3
Hi
ZEN mod, thanks.
Do you refer to your post in this page

Burning Amplifier BA-3

regards
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Old 20th May 2013, 08:58 AM   #960
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Quote:
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here it is - nomenclature by schmtc :

" This is familiar enough. Q1 and Q2 are JFETs which self-bias into resistors R3 and R4 at currents around 8 mA. R1 is chosen to avoid oscillatory interaction with whatever source impedance you might have, and R2 provides a DC reference to ground in the event that the source does not, and also establishes the nominal input impedance.

Q1 and Q2 are largely degenerated by R5, setting the amount of AC current which flows through them for a given input voltage. The voltage gain of this initial stage is approximately

the value of Drain load resistors R6 plus R7 divided by R5. In this case we have roughly unity gain – the Jfets are used as unity gain DC level shifters to Q3 and Q4.

Coming off the Drain of Q1 is the loading network of R6, C1 and P2, and there is a comparable network of R7, C2, and P1 attached to the Drain of Q2. R6 clearly sets the AC load for Q1, but the DC requirements to bias up Mosfet Q3 are higher than that, so P2 in parallel with C1 provides a higher resistance value below about 0.5 Hz, and gives the approximately 3 volt DC drop required to bias the Mosfets.

P1 and P2 are adjusted so as to set the DC bias of Q3 and Q4. You will want to set them at zero when you first fire up the circuit, and increase their resistance to achieve the correct bias voltages across R10 and R11 (about 1 volt) while also keeping the output DC offset voltage at a minimum. This circuit is capacitively coupled at the output, but low offset measured at the Drains of Q3 and Q4 will maximize your output voltage swing.

The voltage appearing at the Gate of Q3 is amplified by something less than the ratio of R13 divided by R10, and with the same happening at Q4(R11) and considering the transconductance of the Mosfets, comes out at about 15. Both of them added make a system voltage gain of about 30X, or 30 dB.

R10 and R11 help set the voltage gain, and they also help stabilize the bias of Q3 and Q4, else it would tend to drift upwards as the parts warm up. The bias current here is about 50 mA, and it will deliver peaks of approximately 100 mA. Q3 and Q4 require heat sinks.

Of course you can bias this circuit higher if you wish – 100 mA bias is perfectly OK as long as you properly heat sink Q3 and Q4, and if you are crazy (like me) you can experiment with higher bias, remembering that the parts are rated at 25 watts, and that it costs you voltage losses across R10 and R11. If you want to play with even higher bias, you can consider lowering the values of R10 and R11 and also R13, all in proportion.

The supply voltage is only critical with respect to the voltage rating of the input JFETs, which are nominally 25 volts. In actual testing, they break down around 40 volts. I wouldn't worry about running them as high as 30V. Hot-rodding this circuit would likely involve cascoding the input Jfets to allow higher voltages. "
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