deepness of outputstages

Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.
Member
Joined 2009
Paid Member
hello everybody,:D

when eating the a good soup for dinner :) I decided to ask you a question that is in my mind

- despite the good soup

normally is said more bias in the output stage, less distortion better sound.
Someone asked Mr. Pass what happens with the good sound when the bias of the devices goes down when paralleled.....and he said something like the sum of currents is important.

For instance Nelson uses 24 or 48 matched devices parallel...in his commercial amps:

the sum of the current is big......but who does the single device feel it neighbors? It has a slow current and should sound worse......

why is the sum of bad sounding single devices a very good sound?


I somebody is eating also a good dinner maybe he is willing to answer:):):)
 
Some parameters sum in benificial ways, some not. For instance, the paralleled outputs reduce the source impeadance of the amplifier improving damping factor. The individual transistor's Transconductance will be reduced at lower current but the total sum of all the output transistors goes up, reducing distortion.
Obviously you might be running more idle current with more transistors but, the heat load is spread out amongst them, and the total current available can be very high.
I'd like to hear the rest of this story myself. I have never built an amp with more than 3 pair at the output (Guitar amps don't count). 3 seems like enough if you bias the s%^&t out of 'em.
 
I think you must look at two different operating phases.
1.) When the push pull output stage is working within it's ClassA current limit. This also applies to a singled ended ClassA output stage.
2.) when the push pull output stage is working beyond the ClassA current limit.

I think you will find that bias current/device and total bias current will give different "output sound" results depending on whether you are in the 1 or 2 operating region.

Take as an example the ClassA output of a mosFET output stage that follows Borbely's recommendation. He suggests at least 500mA of total output bias and at least 100mA of bias for each output device.
500mA of total bias gives ClassA current of <=1Apk This is equivalent to 4W of ClassA power. A 5pair output stage with each device biased to 100mA will also allow <=1Apk of ClassA current.
Now consider what happens when you stay in ClassA or stray beyond ClassA (1 or 2) and change the numbers of output pairs.
 
I had the same question a while back.

Your guess is as good as mine, but here is my guess.

When you have fewer devices at higher bias levels the modulated current (with music) through each device is higher which also means greater changes in temperatures in the die. Transconductance also changes with changes with temperatures. I suppose this means another form of non-linearity and distortion.

On the other hand if you have more devices at lower bias levels then the modulated current through each device is lower which also leads to smaller changes in temperature in the die.

However it is not easy getting perfectly matched devices without a curve tracer.

So where does that leave us? I don't know.

Anyway, with my level of intelligence (total numpty), I would disregard everything I have said.

Edit: Sorry if I am repeating stuff already said. I am a slow typer.

I have a question that I am sure someone can answer. Why do you P-channel devices always (well at least it seems that way) have higher levels of input capacitance to their N-channel complement.
 
Last edited:
Official Court Jester
Joined 2003
Paid Member
Generg

I'm sure Papa will slap me if I'm wrong :rofl: , but you'll find that deep deepness only in Papamps with common source output stage

meaning - current level by one pair is much more important in ,say, F5 than in F4 (considering that F5 isn't common source but common drain output )

that's just one side of disco ball :clown:

there is certainly more .....
 
I have a question that I am sure someone can answer. Why do you P-channel devices always (well at least it seems that way) have higher levels of input capacitance to their N-channel complement.

The real answer is that to produce "matching" (complementry) FETs with the same RDSon, the P-channel device is 2.5 to 3 times bigger than the N-channel device. Bigger silicon area......... More gate capacitance.
 
Last edited:
Was it you who mentioned a LeCroy? Don't they have all kinds of software apps for those things that we might want to use? I actually have wave runners and surffers at my disposal but, I'm sure we didn't buy the extra software for that...
I'll crank up the emu card with some of the available software from the web for some analysis when I get that far...
 
The one and only
Joined 2001
Paid Member
When I saw the topic, the word deepness brought to mind the
perception of deepness that comes with certain topologies and device
choices, which is a much sought-after commodity.

This is manifested as depth of image and depth of resolution; how well is
the image/stage presented and to what extent can you clearly hear what
is happening with each instrument at the bottom of a wide dynamic range.

Of course it does not directly correlate to the number of devices involved -
often the reverse it true.

:cool:
 
Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.