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Old 9th September 2010, 10:14 PM   #11
juma is online now juma  Serbia
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Quote:
Originally Posted by chchyong89 View Post
i will definitely build this for my akm4396 :P
No, you won't - ak4396 DAC chip features voltage output only...
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Old 9th September 2010, 10:16 PM   #12
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sad to hear this
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Old 9th September 2010, 10:19 PM   #13
juma is online now juma  Serbia
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Quote:
Originally Posted by chchyong89 View Post
sad to hear this
Don't be sad, it's excellent sounding chip as it is
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Old 10th September 2010, 09:50 AM   #14
EUVL is offline EUVL  Europe
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This is a quick & dirty schematics just to show the idea of a cascoded complementary JFET IV.
I hesistated to call it cascoded Zen IV, as it is more of a "Blowtorch IV".

Balanced DAC current is fed to the sources of the input jfets, whose gates are tied to ground.
R2,3,19,21 are bias resistors for the folded cascode MOSFETs (say 200R).
Conversion gain (I to V) is set by R22,24.
One may add additional electrolytic caps to parallel R5,6,16,17.
And R1/18, R4/20 can be replaced by constant current diodes for further improved PSRR.
The rails can now be quick a bit lower than +/-30V.
And the choice is not affected by changes in IV conversion gain and first stage bias.
So one can increase R22,24 (say to 2.4k) and use multiple JFETs in parallel without changing Vsupply.
When using JFETs in parallel, R2,3,19,21 wants to be reduced by N (no.of JFETs in parallel).

No coupling output caps, but consumes quick a bit more current.


Patrick
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Old 10th September 2010, 09:53 AM   #15
philbyx is offline philbyx  France
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Hello,

In the same way, I made, with the "UGS by CheffDeGaar" described here :

UGS adventures

a Balanced I/U stage.

The schematic is here :

Click the image to open in full size.

Here in my cd drive with ad1865 (non over sampling) :

Click the image to open in full size.

and the topic (in french, sorry) is here :

UGS, DAC, et Cie - TDG

Philippe
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Old 10th September 2010, 10:46 AM   #16
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I have used the D1 I/V for several years with great pleasure.
So the next pleasure might be this jfet I/V converter.


Just one thing makes me scratch my head, there are 30V on the drains
of the 2sj74, but the toshiba datacheet tells me a maximum drain gate voltage,
or breakdown voltage of just 25V.

I would like to use my +/- 30V supply from my D1 I/V converter.
Did someone allready tried this new circuit without killing the jfets?
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Old 10th September 2010, 11:08 AM   #17
regal is offline regal  United States
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Is there any means to encorporate a DC servo to nix the 10uf output caps (maybe not to Zen like thoug), so otherwise is it appropriat to downsize them to 2uF if your Amp has a 50 kohm input imp, or do you have to change R5 ?
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Old 10th September 2010, 11:22 AM   #18
Zen Mod is offline Zen Mod  Serbia
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there are some funny parts , placed in drains of each jfet ;

they're called resistors , and they're handy for decreasing voltage in appropriate nodes


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Old 10th September 2010, 11:49 AM   #19
regal is offline regal  United States
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I take it R5 sets the f3 required for the coupling caps size, or with a 50kohm load (from the gear its feading) can we reduce the coupling caps to 2uF as before?
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Old 10th September 2010, 11:50 AM   #20
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You will need folded cascode or current mirror if you want to get rid of the output cap as there is about 15vdc across the cap, and that is needed to allow some vds of the input jfets.
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