Buffer Preamp with Shunt PS

[VladimirK]

I plan making this buffer preamp which is supposed to drive 600 ohms input impedance of power amp. Could somebody comment this solution? I hope that the simple shunt-like power supply provides enough supply snubbering and decoupling betwenn the channels.

[Salas]

Make C1,C2 big. 1000uF. The Zeners will need noise filtering and they present relatively low impedance.

[VladimirK]

Originally Posted by Salas

Make C1,C2 big. 1000uF. The Zeners will need noise filtering and they present relatively low impedance.

Using of good electrolytic at this position is possible, also shunted by good film cap. But do we need shunt PS solution in this case, don't we get the same with plain serial PS? Choice of very good caps seems to repair any active PS drawback.

[Salas]

What you have here is shunt stabilization, not regulation, you got no error loop with gain. It will be silent, but not that stiff. I like your simple solutions, I suggest you breadboard it first and then test a series solution too, and see what you prefer. In my DCB1 the shunt regs boosted it a lot subjectively, had it on series before, same thing for Juma with his BF862 preamp, he upgraded from series to a simple current mirror shunt reg. Good caps don't fix performance in my experience, they just let out better what is already available.

P.S. Also see that your R5 will make the T2 CCS run at about 1/3 its JFET's free IDSS. Good for thermal stability.

[VladimirK]

Originally Posted by Salas

What you have here is shunt stabilization, not regulation, you got no error loop with gain. It will be silent, but not that stiff. I like your simple solutions, I suggest you breadboard it first and then test a series solution too, and see what you prefer. In my DCB1 the shunt regs boosted it a lot subjectively, had it on series before, same thing for Juma with his BF862 preamp, he upgraded from series to a simple current mirror shunt reg. Good caps don't fix performance in my experience, they just let out better what is already available.

Thanks a lot for the explainations. Just for my better understanding what we are aimed for with shunt regs, I imagine it so that one must measure a slope of the current vs time curve from the moment of step-wise increase in current demand by the the circuit. Any cap has parasitic inductance and resistance, as well as any active device, hence the curve slope is not vertical. But I red somewhere, that Zener is a fastest device in this respect, its reaction period is less than 1ns, while for more complex shunt reg schematics the reaction time will be more than 10ns. Am I wrong?

[VladimirK]

Originally Posted by Salas

... P.S. Also see that your R5 will make the T2 CCS run at about 1/3 its JFET's free IDSS. Good for thermal stability.

Thanks. I knew thermal stability criterion for a j-FET as Vgs=Vpinch-off - 0,66V. Usually it is suitable for low Vpo parts. In the present case Vpo close to 5V, and at 5-0,66=4,34V gate bias Id will be too low. Not sure is this thermal stability criterion the same as 1/3 of Idss. I would love if correct is 1/3 Idss. T1 and T2 must be a selected pair and be in close thermal contact. Usually it is enough for keeping output voltage within +- 2mV. Thermal stability point could contradict to other requirements, like idle current needed and power dissipation admittable.

[Salas]

Originally Posted by VladimirK

Thanks a lot for the explainations. Just for my better understanding what we are aimed for with shunt regs, I imagine it so that one must measure a slope of the current vs time curve from the moment of step-wise increase in current demand by the the circuit. Any cap has parasitic inductance and resistance, as well as any active device, hence the curve slope is not vertical. But I red somewhere, that Zener is a fastest device in this respect, its reaction period is less than 1ns, while for more complex shunt reg schematics the reaction time will be more than 10ns. Am I wrong?

You are not wrong. Its only it is not a reg this one. Its stable as a Vref with current to spare. I use it with LEDs instead of Zener in cascode base biasing. If its enough for the circuit's dynamics here, given its Zo as a voltage source, it will do very elegantly.

[VladimirK]

I used scope to look at the noise voltage amplitude at D1 without C1. At 1 mV/div scope sensitivity, noise caused the scope's line to become thick as 0,7 division (0,7mV peak-to-peak). By adding 2,2uF film cap noise induced voltage fluctuations decreased to 0,3mV p-t-p. Can such a noise level, superimposed on the supply voltage, cause listenable effects? Just would be grateful if somebody got experience in this question.

[Jen-B]

V, I do not know the exact answer to you question, however I have seen zener voltages drift some % over time and that may be a problem for your circuit?

[VladimirK]

Originally Posted by Jen-B

V, I do not know the exact answer to you question, however I have seen zener voltages drift some % over time and that may be a problem for your circuit?

The same thermal drift of zener voltage we have in series regs, where Zeners are used as a reference, like in Zen4 power supply, for instance. I used previously similar series regs with similar buffer j-fet stages, and stability of output voltage was very good (within +- 2mV), provided j-fets are matched.