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Old 13th May 2013, 08:15 AM   #291
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for each pair
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Old 13th May 2013, 09:14 AM   #292
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OK, will try that once I get a new soldering station, thanks.

I guess the current circuit is oscillating, with charge flowing from one gate to the other, but I haven't hooked it up to my old scope yet...
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Old 13th May 2013, 09:16 AM   #293
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if that is more convenient , layout wise , you can have gate resistor for each jfet
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Old 13th May 2013, 08:58 PM   #294
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luda,

also,

look to have a resistor from input to ground
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Old 13th May 2013, 09:15 PM   #295
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one input resistor , common for all parallel cells , is exactly enough
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Old 13th May 2013, 10:14 PM   #296
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Quote:
Originally Posted by Luda View Post
OK, will try that once I get a new soldering station, thanks.

I guess the current circuit is oscillating, with charge flowing from one gate to the other, but I haven't hooked it up to my old scope yet...
I would suspect a simple difference in Vgs (and Yfs) is causing your offset. Matching Idss between P and N channels doesn't address this issue.
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Old 13th May 2013, 11:39 PM   #297
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Quote:
Originally Posted by Luda View Post
I build the circuit shown above and get anything between 0.2 and 1 Volt Vout.

Due to the untimely death of my soldering station I'm not that motivated to go bug-hunting right now, but should I have used a 1k resistor for every pair of 2SK170/2SJ74 or even 1 for every FET?
Scott Wurcer has commented authoritatively (IMHO) that a single resistor will
stabilize 4 of the 2SK170 / 2SJ74. In other words, 2 pair. I think you are probably OK.

How closely did you match Idss of the parts?


Last edited by Nelson Pass; 13th May 2013 at 11:42 PM.
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Old 18th May 2013, 11:38 AM   #298
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Strange; this thread no longer has my past contribution posts.
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