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Old 28th April 2009, 06:41 PM   #1
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Default UGS Problem

I'm building an XA100 varient and have started testing the UGS front end before I connect it up to the output boards. Unfortunately it seems I have a problem: the UGS oscillates at around 700KHz even with the inputs shorted.

So far the only cure I have found is to either load each output with around 1nF or place 4.7pf caps across feedback resistors R23 and R24. Unsurprisingly, both result in poor HF response.

The real question is why does the circuit spontaneously oscillate in the first place? Is there something poor in my PCB layout (double sided, fairly conventional), do I need an earth plane? Perhaps the problem would be resolved by increasing the gate stopper resistors to say 470R?

I've not read of others experiencing this problem so I must have done something pretty stupid.

Help, anyone?

Ian.
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Old 28th April 2009, 07:29 PM   #2
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Your cascode bases are seeing high impedance, which is limiting your
bandwidth.

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Old 29th April 2009, 08:10 AM   #3
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A bit thank you Nelson for your advice

The cascode bias arrangement is not something I would have considered as there seem to be plenty of other similar designs (e.g. Chef's UGS-P) that use a similar arrangement apparently without issue.

If I recall correctly, you did mention in a previous post that you had learned some interesting things about biasing the cascodes but I don't remember seeing any subsequent detail. Is this something you might share soon?

In the meantime I will explore ways to reduce the AC impedance and report back.

Ian.
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Old 29th April 2009, 08:12 AM   #4
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Apologies, I meant "big" not "bit in my previous post.

Ian.
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Old 15th June 2009, 06:37 PM   #5
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Well I finally found time to experiment a little here and am reporting back as promised. I did the simplist thing I could think of seeing as my layout for the moment precludes more than simple experimentation (a lesson to learn here). I connected each cascode base to ground with a 0.1uF capacitor, 4 in total. The result? Much better

Open loop -3dB frequency went from 14 KHz to56 KHz and the closed loop from 69 KHz to 178 KHz. Better still, a 10 KHz square wave now looks very reasonable, just a hint of high frequency roll off and no sign of any instability. Thanks very much for your help Nelson.

I am still intrigued why others haven't seen this problem but I guess that will just have to remain a mystery unless someone would care to share their experience. I'm also interested in other solutions, such as a proper DC supply for the cascodes with low impedance at all frequencies. Maybe I will get around to trying these out sometime.

Ian.
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Old 15th June 2009, 08:08 PM   #6
gl is offline gl  United States
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Hi Ian,

Your idea with the caps is very neat. It had not my first thought when I originally read this thread.

Your resistor chain is about 53K and draws about 1.4ma. I would have halved the values of the resistors for starters or reduced the values in the chain as low as possible without the dissipated power becoming greater than one third of the resistor power rating. That would avoid adding any ground connections.

If you're willing to add connections to ground then putting zener diodes to ground from the bases is another idea - about 7.5V to 9.1V.

Cheers,
Graeme
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Old 15th June 2009, 08:19 PM   #7
Zen Mod is offline Zen Mod  Serbia
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you can also try with 1uF across each 8K8

edit:

in any case , as gl sez - decreasing value of bias network is good thing
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Old 16th June 2009, 04:49 PM   #8
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Thanks for the benefit of your replies Graeme and Zen Mod.

I did think about reducing the values of the bias resistors as you suggest Graeme, but to tell the truth I am not sure how low an impedance I need to solve the problem. The issue is primarily AC impedance, hence my decision to use caps to ground. I also considered the zener approach (with cap bypass) but this would dump more current to earth than I would prefer. I still might try this out though.

Not sure about bypassing the 8K8 resistor as you suggest Zen Mod - how would this reduce the impedance seen by the cascode gates? I did try something similar which didn't seem to work very well although I was using flying leads which I am sure wouldn't have helped.

Another option I considered was bypassing the resistors between gates and power supplies, i.e. 4 in total. This would reduce the AC impedance but I suspect would also add ripple and noise so I didn't take it any further.

Ian.
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Old 16th June 2009, 05:22 PM   #9
Zen Mod is offline Zen Mod  Serbia
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another one - you can see that Papa ( from his own reasons ) is always biasing cascodes against ground .......... not sources of jfets/mosfets .

I have impression that putting at least 1mA through bias voltage divider for smaller cascode parts (TO92) is always enough , but for bigger ones double or triple can't do any harm .

anyway , whenever I try to anticipate Papa's reasons , seems that I'm right only in one case - to confuse spoiled children .......

seriously - it's easy to solder plain 4u7 elco across that 8k8 ;

try that ...... if not good , you can always say that ZM is dumb , not you

edit :

even without trying cap across that resistor , you can say that ZM is dumb , not you .........

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Old 16th June 2009, 06:45 PM   #10
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Quote:
Originally posted by Zen Mod
another one - you can see that Papa ( from his own reasons ) is always biasing cascodes against ground .......... not sources of jfets/mosfets .
Fets can give better performance if you work the load line properly,
and this implies non-constant Vds.

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