Preamp ideas for F5

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As shocking as this may sound Tinitus, i know the cap would accomplish this task, but as I said above, i know caps have audible effects, so not using them is ideal. I apologize if my trying to learn something is cumbersome to your reading. You do have the option of not reading. It is possible that others may have similar questions but are afraid to speak up due to more experienced members tendency to point out deficiencies in thinking. If i have worn out my time in this thread I will happily bow out and learn by smoking, as I have in most cases.
 
...every time i plugged it into main amp, offset whet crazy...
Something is obviously wrong because if you have 0mV at the preamp's output and 0mV at amp's input nothing should happen when connecting these two nodes. Retrace your steps and find the culprit.

how do you match for tempco...
Empirically. I know that high gm JFETs have zero tempco at Id somewhere around 70-90% of Idss and I set the Id in that region with 20R trim-pot in the JFET's source. Next thing to do is to fiddle that pot until you find the value where Id stays the same no matter if JFET is cold or hot (cold means you blow on it to cool it and hot means you touch it gently with soldering iron's tip).
If you have means to measure the gm/transfer curve of the JFET you'll find out that JFETs with matching curves have matching zero tempco points too.
For practical purposes, Idss matching, thermal coupling and and using a trim-pot in the circuit are sufficient.

Anyway, we all know that friends are there to have their benevolence abused from time to time but it would be nice to surprise them pleasantly once in a while by doing the homework, so a bit thicker skin and cheering up is all we need :cheers:
 
Something is obviously wrong because if you have 0mV at the preamp's output and 0mV at amp's input nothing should happen when connecting these two nodes. Retrace your steps and find the culprit.

If I had to guess, I would think it was may ground layout. Board layouts are a significant learning curve all by themselves.

Empirically. I know that high gm JFETs have zero tempco at Id somewhere around 70-90% of Idss and I set the Id in that region with 20R trim-pot in the JFET's source. Next thing to do is to fiddle that pot until you find the value where Id stays the same no matter if JFET is cold or hot (cold means you blow on it to cool it and hot means you touch it gently with soldering iron's tip).
If you have means to measure the gm/transfer curve of the JFET you'll find out that JFETs with matching curves have matching zero tempco points too.
For practical purposes, Idss matching, thermal coupling and and using a trim-pot in the circuit are sufficient.
I have a curve tracer that is o the blink, at the moment. Ill play around with it and see what I come up with. I used Rs of 10 on both source legs, with 200ohm pot in parallel, so i should be in same area as the 20omh pot you suggested. For me, the unknown is the BJT. I cut my short teeth on Jfets and Mosfets ad BJT's just seem like an alien in terms of operation.

Anyway, we all know that friends are there to have their benevolence abused from time to time but it would be nice to surprise them pleasantly once in a while by doing the homework, so a bit thicker skin and cheering up is all we need :cheers:
:cheers:
 
Each Source in the chain must be capable of driving the combined load of the Receiver and the cable connection to that Receiver.

If a Source can drive that complex load then a Buffer is not required.

Any equipment in the middle of the chain acts as both Receiver and transmitter.
For example a passive volume control has an input impedance value that equals the resistance of the track and to a smaller extent the upstream impedance of the next link/Receiver in the chain.
That same passive volume control also has an output impedance. This output impedance varies depending on the attenuation of the control. It can vary from zero ohms to approximately one quarter of the track resistance. Here too the Source feeding the passive pot has a small influence on the output impedance.

Now let's expand that Passive Pot.
Use a 100k dual track log law potentiometer.
Zin <= 100k This is an easy load for just about any Source. Add in a cable from Source to Vol pot. That cable has capacitance. The Source must drive both the cable capacitance and the 100k resistive load. There is a limit to how long that cable can be.

Now looking at the output side. Zout is 25k when the attenuator is set to -6dB.
Feed that into a 100k Zin of the next Receiver. No Problem if there is no cable and parasitic capacitance is designed to be very low.
Add in a cable interconnection and HF attenuation steps in to ruin the performance of the vol pot to receiver link.
High source impedance cannot properly drive cable capacitance of audio cables.

When the Source cannot properly drive the complex load of Zin+Cable then you must use a Buffer to improve the audio performance of the audio link.

From all of the above it should now dawn on you that the F5 does not need a Buffer in front of it. Read that again. If necessary read this whole post and it should become obvious.
 
B1 is redundant , if using proper preamp

if preamp is having highish output impedance , then ( input-volume-less) B1 is welcome addition

Thankyou, i see a couple of Pre's mentioned here, anyone have a favored one or is there a favored one for the F5? i think i will need a little more gain.

Thanks AndrewT, i need to read your post couple times and take it in :) is making sense tho!
 
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