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Old 16th February 2013, 03:56 PM   #371
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Originally Posted by buzzforb View Post
Ill give it a listen how I have it now and reduce Rs if I like what I hear. It is driving the F5TV2 that will go to my brother, so the low Zo should not be a problem. I had to parallel resistors to get values needed.
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Old 16th February 2013, 06:11 PM   #372
juma is offline juma  Serbia
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Originally Posted by buzzforb View Post
...What would cause the instablity, otherwise?...
Thermal drift - read this:
ken-gilbert.com/images/pdf/erno_borbely_on_jfets.pdf
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Old 17th February 2013, 11:18 AM   #373
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I have both of his papers in permanent file. My question is, why if f5 output stable and this preamp prone to drift? Both have feedback, which should help. The F5 has the Thermistor in the bias arrangement, but I have built your Toshiba version without it. Built other comp Jfet circuits that didnt have stability issues.

Side not3. Is the 1uF cap necessary. I left it out assuming it was just a safety measure.
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Old 17th February 2013, 11:26 AM   #374
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Originally Posted by buzzforb View Post
... why if f5 output stable and this preamp prone to drift?
maybe because F5 output have a big heat sink controlling temperature

but your pre only have wimpy small TO-92 BC550/560 .... maybe it would help to heatsink them
could be like just putting them into holes drilled in a mutual alu bar, or copper

UPS! I see you have changed those...right ?
hey...looks like it would be very easy to heatsink those substitute KSA/KSC
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Old 17th February 2013, 11:35 AM   #375
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They have KSa1381/3503 on heatsinks. Juma was eluding to the Jfets, based on the article he sent me, but perhaps I misunderstood.
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Old 17th February 2013, 03:23 PM   #376
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Originally Posted by buzzforb View Post
...why if f5 output stable and this preamp prone to drift?...
If you look very carefully you'll notice certain dissimilarities between F5 and this preamp
1. F5 has trim-pots in the MOSFETs' gate circuits to adjust symmetrical working of the output stage. In this preamp, the trim-pot is in JFETs' gates circuit so symmetrical working is set or ruined by JFETs.

2. Also, F5 is employing NTCs in the gate circuit in order to compensate for thermal drift and that's beautifully explained in F5 service manual (which you also have in your file repository I suppose).

3. F5 has MOSFETs at output and this preamp has BJTs - I leave to your knowledge hungry spirit to investigate differences in thermal behavior between these two types of devices (which is nicely covered in numerous educational writings).

So Buzz buddy, it's nice to have all the books, but reading them is irreplaceable...
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Old 17th February 2013, 03:35 PM   #377
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2. The lack of ntc's was mentioned, thank you.

So the crux of the matter is the bjt's in the output. Their biasing and thermal tendencies are what add that irritating touch that requires more reading(bla). Although I cannot argue about the lazy issue, understanding bjt's is not a single sitting affair and I did mention my ignorance before hand.

I redesigned the board to allow thermal coupling of the Jfets, per your suggestion. I am out of town for next week, so ill read up and redo when I get home.

Who knew a simple circuit could be so hard

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Old 17th February 2013, 04:19 PM   #378
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BJTs have their share here, but in this circuit they are not under great thermal stress.
Item nr 1. from post #376 is crucial. Input stage's tendency to drift with temperature is more important. It would be great to match JFETs and operate them at zero tempco but it would demand a lot of work and a lot of parts - next best thing is to use JFETs that belong to same Idss group, couple them thermally and operate them in high Id region (as close as possible to zero tempco point). When everything is done correctly it's easy to achieve very low drift (+/-1mV difference between cold and hot state).

You were asking about 1uF cap at the input - I drew it only as a safety measure against DC leaking signal sources. That brings me to another point - all this thermal drift setting can be cumbersome because it depends on JFETs you got. Anyway, the easy cure is a nice 1uF coupling cap (WIMA MKP10 for example) at the preamp's output - it won't degrade the sound with F5T and will give you a permanent peace of mind.
It's easy to try, you'll be surprised
WIMA MKP10 1,0uF 630V :: MKP10 :: WIMA :: Film Foil :: Capacitors :: Passive Components :: Electronic Parts :: Banzai Music GmbH
WIMA MKP10 400V 1uF P=20 Polypropylene Capacitor(10-Pack) $27.92 Free Shipping @GoodLuckBuy.com
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Old 17th February 2013, 07:23 PM   #379
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I used 10ma Idss matched fets in what I am calling failure 1.1. Could get offset very close with only a little drift, but every time i plugged it into main amp, offset whet crazy ad popped a fuse.I think it was poor ground layout, as I know nothing of board layout. New redesig has fets positioned to thermally couple them and 1uF cap on input. Havig just listeed to a RIAA, caps i signal affect signature, without a doubt. Got some if I need them.
Just for the hell of it, how do you match for tempco. Seems like something that is good to know, if you dont mind.
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Old 17th February 2013, 07:29 PM   #380
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Originally Posted by juma View Post
- all this thermal drift setting can be cumbersome because it depends on JFETs you got.

Anyway, the easy cure is a nice 1uF coupling cap (WIMA MKP10 for example) at the preamp's output.......
good to remember, in case..
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