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Old 20th October 2012, 12:41 PM   #311
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this pre should be set in front of my "just finished" F5. I don't plan to have any cap in the row
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Old 20th October 2012, 12:41 PM   #312
AndrewT is offline AndrewT  Scotland
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Fit the DC blocker at the input of the Power Amp.
There you have the Rin value and thus can sensibly select an appropriate cap value that gives the bandwidth that you want/need.

If you decide to fit an extra DC blocker in the Source, then at least make it optional, so that you can choose whether the power amp or the source has the more appropriate blocker. Remember you do not need dual DC blockers.
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Old 20th October 2012, 01:19 PM   #313
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So, apart of "cap / no cap" (the never ending story) it looks i need to adjust BJTs and JFETs location to minimize drift. This is a picture of my current layout
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Old 20th October 2012, 01:58 PM   #314
tinitus is offline tinitus  Europe
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Quote:
Originally Posted by gcolnaghi View Post
So, apart of "cap / no cap" (the never ending story) .....
never ending story ? not sure what you are saying

your F5 have no input cap, right ?
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Old 20th October 2012, 02:18 PM   #315
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correct, no input cap.
many people doesn't want any cap on the signal path (i know it is risky) other goes for a "more conservative" way .....this is the story i am talking about. Sorry for my poor english
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Old 20th October 2012, 02:42 PM   #316
tinitus is offline tinitus  Europe
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ok, I always thought only alternative to no cap would be a servo curcuit dealing with DC
never considered no DC protection at all could be an option

well then, I guess you have to trust your curcuit 100% not to drift or fail and possibly pass DC
does not seem like that right now then
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Old 20th October 2012, 07:47 PM   #317
juma is offline juma  Germany
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Quote:
Originally Posted by gcolnaghi View Post
...This is a picture of my current layout
It explains the thermal drift...
You have pictures of good working layout in posts #54, #82 and #90. I suppose that you know why did you choose to ignore it ...
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Old 20th October 2012, 09:19 PM   #318
tinitus is offline tinitus  Europe
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looks like your jfets could still be pushed to touch each other
and the BC's ? maybe 'join' them with something heat sensitive
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Old 21st October 2012, 09:03 AM   #319
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I started considering the layout in suggested posts. But later i wanted to try my own way only for the fun of learn a PCB design program and play around.
As i am a novice i didn't know/considered that FETs need to be thermally coupled. Thanks for help
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Old 21st October 2012, 09:43 AM   #320
AndrewT is offline AndrewT  Scotland
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Quote:
Originally Posted by gcolnaghi View Post
............As i am a novice i didn't know/considered that FETs need to be thermally coupled. ..........
You have been a Member for 4 years.
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