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Old 19th April 2008, 03:17 AM   #191
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Default Re: cicuitry testing / designing

Quote:
Originally posted by Nicola


Small question, what software is it you use to draw / test circuitry ?

regards
Yes, it's MultiSim -- all the ill-gotten gains of the Tech-DIY webstore go to pay for my licenses (and Bordeaux). You can get a version with some good functionality, but a limited number of nodes on the Analog Devices website.

jack
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Old 19th April 2008, 03:28 AM   #192
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Quote:
Originally posted by apassgear


Conceptually looks great really, you got my humble blessing.

I would put those power resistos flat over the board though, even if that means a bigger PCB
They get the heat away from the board quite effectively -- but they also require a pin-header to measure the bias current.
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Old 19th April 2008, 05:11 AM   #193
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Quote:
Originally posted by lumanauw


Around the output stage limiter, what is the function of 10K (connected to output node)?

Hi Lumanauw,

Oh . . . you are a member of the mafia . . .

Understanding the designer's intention fully, just by looking the
circuit, is always difficult. I just presume that the 10K watches the
output voltage and limit the voltage increase (or decrease) to the
certain level so that the minimum necessary Vds of the acting
gain MOSFET can be maintained.
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Old 19th April 2008, 07:16 AM   #194
EUVL is offline EUVL  Europe
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a) Thermal simulation software are quite accurate. I have managed to get to within 2degC on a 40degC temperature rise between measured and calculated.

b) If you can find some published pictures of the XA160 or XA200 inside, you will see that Nelson did not mount the devices directly onto the (black) heatsink, but on thick aluminium heat spreaders which span over the entire heatsink surface. You are then no longer limited by the thickness of the heatsink base plate itself. I have give you enough hints.


Patrick
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Old 19th April 2008, 02:03 PM   #195
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Quote:
Originally posted by EUVL
> Here's a conceptual PCB design
IMHO :
1) I would use a foil resistor at the MOSFET source (R11), like e.g. MPC74 0R47, which has a similar footprint as wire wound ceramic resistors.
2) I would place TH1 directly on the MOSFETs for thermal compensation.
3) I would place R13 as close to the MOSFET gate as possible.
4) I would place R3, P1, R15 as close to R13 & R11 as possible.
5) R19, R17, R21 and the BJT can be placed further away, as they are only for protection.
In addition, the feedback path also want to be as short as possible, without saying.
Patrick
1) I'll try it with both a metal foil ceramic and WW --
2) The thermistor can be mounted on the device or on the HS.
3) R13/14 are a few mm from the gates
4) As R11 heats, the resistance of R3 and P1 (etc.) will increase -- wouldn't you want R3/P1 R4/P2 further away from R11/12?

What would you suggest as a temperature coefficient for the thermistor?

When I get the boards wired up I will run them on my spec analyzer out to a few MHz -- as the gate stoppers are purposefully low...
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Old 19th April 2008, 02:27 PM   #196
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R1 and R2 share some pretty hefty current as well.
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Old 19th April 2008, 06:06 PM   #197
EUVL is offline EUVL  Europe
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For myself, I almost always use TO220 or TO247 (e.g. Caddock) power resistors for source degeneration. Which means I just mount them on the heatsink next to the FETs, and hard wire from source to resistor. As such, components on the PCB do not see any of the major heat dissipating elements directly.

But then some of you might want something less expensive. So that was why I gave you another tipp to use MPC71 or MPC74 :

http://www.nova-elektronik.de/english/resistors/mpc.php

http://www.buerklin.com/

If you mount them on the PCB, such that the ceramic body is say 4mm above PCB (either with a knick in the leads, or a ceramic standoff), 1/4W resistors lying flat on the PCB will also see very little of that heat. In a Class A amp, everything sees the heatsink temperature (say 55 degC) eventually. So I would say your worry is undue.

Tempco of the NTC depends on the tempco of the FETs, which is different from FET to FET. For IR FETs, you'll have to ask Nelson.

For R1 & R2, you can always parallel 2x or 3x 2W resistors to reduce the tolerance and inductance.


Patrick

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Old 19th April 2008, 07:04 PM   #198
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Does the F5 need to see an easy load to work best or might I treat it with a complex passive Loudspeaker X-over?
Stabilitywise those drain outputs should work great.


Rüdiger
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Old 19th April 2008, 07:11 PM   #199
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Quote:
Originally posted by Onvinyl
Does the F5 need to see an easy load to work best or might I treat it with a complex passive Loudspeaker X-over?
Stabilitywise those drain outputs should work great.


Rüdiger
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Old 19th April 2008, 08:15 PM   #200
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It's, by design, not the king of damping factors. With a speaker very sensitive to that and with very irregular and lowish impedance (IOW: older Kappa or so) it might be suboptimal.

- Klaus
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