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Old 1st July 2008, 12:57 PM   #121
regal is offline regal  United States
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Sounds like you have an Adacom GDA700?

I will study the PMD datasheet this week, if we can get the PMD to work I can almost guarantee you will be surprised.
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Old 1st July 2008, 01:12 PM   #122
spencer is offline spencer  Hong Kong
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Paul,

If you can make the D1V3 sound, I am surprised that you cannot make the PMD100 converter board works! Is it something else wrong as I have sold more than 20 PMD100 and there no even one compliant on that.

Spencer
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Old 1st July 2008, 06:23 PM   #123
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Hello spzzzzkt!
Many thanks for your answer and for all your informations.
This is an important help for me!
I ask you only an ulterior detail:

When you talk about the DAC chip supplies from the +/-18V, you say:
" I'd highly recommend that you apply the bypass caps to Radj on the LM337+LM317 regulators as these are required to get best performance from the LM3x7's ".
What does "Radj" means?
Escuse me, but my english is not good, and often the technical words assume different terms and abbreviations in the different languages, so I am not able to translate "Radj".
Many thanks again. Best regards.
Davide.
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Old 1st July 2008, 09:18 PM   #124
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regal: assemblage DAC 2.0 with parts upgrade kit.

spencer: i've possibly damaged one of the smd cap or resistors? i done some basic trouble shooting but could find the cause.

t.s.: take a look at http://www.acoustica.org.uk/t/3pin_reg_notes1.html Radj is the the adjust resistor R2 in the description.
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Old 1st July 2008, 09:47 PM   #125
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Default Reg volt adjus pin

Often better results to use "string" of LEDs (in series) to replace this R2.
There are many simple plans about improving regulator performance on the net - take your time and try out some of the simpler circuits without getting into the complicated feedback I.C. systems - and get a better understanding about what works for you.
It's quite surprising what a "cleaner" regulator does for both digital and (seperate) analogue circuits.
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Old 1st July 2008, 10:12 PM   #126
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t.s. i forgot to say that adjust bypass caps are C2 or Cadj. It might be worth trying a low-ESR 100uF in this position.

I'm using paralleled zeners plus diode as suggested in the link and discussed in the digital forum as the "raygulator". The LED's would probably be better but the zener/diode units barely squeeze into the available board space so fitting LED's might be a bit of a challenge.

I've finished off the Tangent LNMP so should get a chance to make up a test rig to see what effect the different mods actually have on noise levels.
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Old 2nd July 2008, 08:22 AM   #127
regal is offline regal  United States
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For the LM317/337 bypass caps is a 10uF Tant Cap a decent choice?
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Old 2nd July 2008, 09:16 AM   #128
regal is offline regal  United States
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SPZKT,

I was thinking possibly with your reclocking you are feeding the PMD100 with too high a freq? The PMD100 is a 48khz max device.

I am hoping to complete my build this weekend and am trying to wipe out any potential roadblocks. Stupid me didn't order a different filter for backup.
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Old 2nd July 2008, 09:48 PM   #129
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as long as you use a low esr cap. personally I'd go for a 100uF panasonic FC/FM or a rubycon ZA in this position.

the pmd100 doesn't work with either cs8412 recovered clock or with the vcxo clock - both of which are 256*fs. I've pulled the resistors off the pmd board and I'll replace them as they look like they've now lost the end caps.

i made the mistake of trying to add the extra reg to the vcxo board and had trouble soldering to the tarnished copper. It looks like I short circuited the center pin to output and ended up pumping 8v into the pll bias and digital chip supplies. This appears to have killed both the 4046 and 4020. The vcxo is still putting out a clock but I'm not sure if I've dumped 8V into the adjust voltage - if that has happened I've also cooked the vcxo.

Anyway I'm now stuck listening to the recovered clock from the CS8412 until I get replacement chip and it is a definite step backwards, especially from the last (working) revision on the VCXO. The imaging is less defined, and the sense of empty space around instruments is far less apparent.

Before the "disaster" I discovered that the output of the VCXO was 90degree out of phase with the original clock. I had thought this might be an issue but rereading the PLL section of the "Audio DAC" pages it seems that the sm5842 is designed to cope with a LCRI that is up to 3/8 of clock period different from the data clock. If I understand correctly this is the equivalent of 120degrees out of phase so the difference is acceptable but does mean that the sm5842 needs to run in "jitter free" mode.
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Old 2nd July 2008, 11:19 PM   #130
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that should be 135 degrees, not 120.... anyway plenty of margin.
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