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Old 6th October 2010, 08:02 PM   #801
frags is offline frags  Canada
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Quote:
Originally Posted by Yunick View Post
I did some measurements tonight..

My rails are +/- 22.5V and bias 1.22A.

Heatsinks are measured with a IR gun.
Fets are 60 deg C, sinks are 55 deg C behind the fets and 45 deg C at the ends..
It will give you about 88C of junction temperature which is safe and far away from maximum (175).
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Old 6th October 2010, 08:04 PM   #802
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Quote:
Originally Posted by Yunick View Post
I did some measurements tonight..

My rails are +/- 22.5V and bias 1.22A.

Heatsinks are measured with a IR gun.
Fets are 60 deg C, sinks are 55 deg C behind the fets and 45 deg C at the ends..
5 deg difference between fets and rest of hsink is good

regarding overal temp - it's important that lower and upper plate have enough holes , so inner parts aren't scorched

anyway - just remember MF A1 and A100 - they just couldn't live that long as majority of them lived .....
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Old 6th October 2010, 08:48 PM   #803
frags is offline frags  Canada
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Who's Poor Mr. Kirchhoff Anyway? Aaarghh!
Are you kidding me? Gustav Kirchhoff was one of electrical PAPAs like Georg Ohm.

Gustav Kirchhoff - Wikipedia, the free encyclopedia
Kirchhoff's circuit laws - Wikipedia, the free encyclopedia
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Old 7th October 2010, 06:05 PM   #804
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yeah - good old Mr.
YouTube - Jimmy Durante 'Did You Ever Have the Feeling '
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Old 7th October 2010, 06:10 PM   #805
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Quote:
Originally Posted by Yunick View Post
I did some measurements tonight..

My rails are +/- 22.5V and bias 1.22A.

Heatsinks are measured with a IR gun.
Fets are 60 deg C, sinks are 55 deg C behind the fets and 45 deg C at the ends..
thank you

would you measure Vds of pair
I like to know the exact practical value of dissipation of each FET because I would like to try If possible to higher bias on MF35-151.5

Last edited by samoloko; 7th October 2010 at 06:12 PM.
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Old 8th October 2010, 12:32 PM   #806
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I'm going to reiterate what I said earlier about the current limiting aspects of the Aleph J. Below is a paragraph from NPs F5 article.

(Understanding the limiting circuit is easy. Q5 and Q6 look at the voltages across the R11 and R12, and will start to conduct when their Base to Emitter voltage exceeds .4 volts or so. At .4 volts Q5 and Q6 draw off enough drive current from Q1 and Q2 to start creating measured distortion, and hard limiting occurs when the voltage driving Q5 or Q6 is increased to .6 volts.)

For all you self proclaimed experts, go argue with The Master. Sometimes trying to be helpful around here just isn't worth the abuse. And I studied Kirkhoff's law when he was still alive.
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Old 8th October 2010, 03:57 PM   #807
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Bravo. Though we still need to know what is the maximum current drive at full swing.

If i well remember, in the F5, Papa himself modified the limiter resistor values after a while.
Anyway i must confess i prefer no current limiting at all.
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Old 8th October 2010, 04:14 PM   #808
frags is offline frags  Canada
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Bill,
if you calculate the voltage drop across limiting transistors in Alpeh J and F5 at idle you will get about 0.39V in both. I just wanted to say that such schematics can be mathematically calculated and we do not need to guess if some resistors have too high/low values.

It would be nice if Mr. Pass comments it.

PS. Sorry, I did not mean to abuse anyone.

Last edited by frags; 8th October 2010 at 04:18 PM.
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Old 8th October 2010, 04:24 PM   #809
generg is offline generg  Germany
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Gustav Robert Kirchhoff (12 March 1824*– 17 October 1887)

Bill you met ihm really?
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Old 8th October 2010, 05:36 PM   #810
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Gustav Robert Kirchhoff (12 March 1824*– 17 October 1887)

Bill you met ihm really?
Maybe it was his grandson.
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