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Old 17th October 2007, 06:21 PM   #1
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Default D1 Volume adjustments

Can anyone confirm if this is the correct output behavior for the D1?

With the attached SIM's see how the vertical alignment of the output voltage swings with the minimum and maximum settings of PL55. PL55 set to minimum seems right, but at maximum the signal voltage decreases slightly, and the +/- waveforms change their vertical alignment.

Somehow this cannot be correct?

-David
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Old 18th October 2007, 04:32 PM   #2
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Anyone??

BTW, Here's the schematic.

-David
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Old 19th October 2007, 02:36 PM   #3
cviller is offline cviller  Denmark
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That PL55 circuit looks a bit odd to me, where is it discussed? Or what is it supposed to do?

I have simulated on D1 before, but I can't remember my exact voltages. I do however think the 10Vpp is quite high for this configuration.
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Old 19th October 2007, 05:52 PM   #4
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PL55 is straight from the D1 Service manual as a volume control.

I believe a lot of DIYer's have not included this in their own implementations.

Attached is the PL55 diagram.

Thank you for any help!

-David
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File Type: jpg pl55.jpg (32.5 KB, 466 views)
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Old 19th October 2007, 06:01 PM   #5
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I'd really like to know why PassLabs placed the 4.7u cap C1 on the wiper of PL55!

Running a sim with the cap removed I get the correct vertical phase output with PL 55 set to 90%.

What is the purpose of C1?

-David
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File Type: jpg d1-output-90percentpl55 no c1 cap.jpg (49.7 KB, 402 views)
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Old 19th October 2007, 06:04 PM   #6
cviller is offline cviller  Denmark
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Oh, I see!

I'm not sure, but it kinda looks like it is implemented differently on your schem compared to the service manual.
In the service manual, I supose the "volume+" of PL55 is connected to "vol+" of the IV diagram, and if this is correct, the capacitor C1 is just left dangling in parallel with the resistors until the wiper. In this way, unlike your schem, the capacitor is not placed between the active nodes.

It does however seem a bit odd to me, but it might be worth a try in the simulator.
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Old 19th October 2007, 06:06 PM   #7
cviller is offline cviller  Denmark
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Great - you tried my suggestion even before I posted it!!
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Old 19th October 2007, 06:07 PM   #8
cviller is offline cviller  Denmark
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I think C1 is there to suppress noise picked up on the floating resistors.
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Old 19th October 2007, 06:25 PM   #9
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Thanks cviller for helping catch the schematic error!!

I fixed the connection to PL55 and the circuit now seems to sim correctly with the C1 cap in place.

-David
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File Type: jpg pass d1 i-v revised.jpg (46.1 KB, 512 views)
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Old 19th October 2007, 06:28 PM   #10
cviller is offline cviller  Denmark
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Cool. Then you just have to replace the irf610 with jfets as papa always suggests...
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