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Old 22nd January 2007, 01:27 PM   #1
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Default Gate capacitance and gate charge

For a large switching FET, in order to get the FET to switch quickly and to avoid excess power consumption, a large Vgs (usually >10V) must be supplied, along with a fair amount of current behind that Vgs supply (~1 amp of transient current for a large FET).

What is the difference between gate capacitance and gate charge, in terms of how much gate current/gate-source voltage needs to be applied? I thought the measure to be concerned about when switching a FET was gate charge, but how does gate capacitance come in to play?
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Old 22nd January 2007, 05:11 PM   #2
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The two are related.

It is Gate voltage which controls the D/S channel conductivity, but to get the gate to required voltage requires charging up the gate capacitance.

A useful formula is q = CV = IT (q = charge)

So if there is a high gate C, (large geometry) either Time is required (slow) or a large Current to charge it.

Think about the CV=IT bit.

It is very useful in understanding the relationships between C, V, I, T. linked by the concept of charge.
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