Thats the problem with that pair, their lowish hfe make them better suitable only for MC, for slightly higher impedance many like the 2sa1085 pair are better. No mattar they have all been discontinued.
How high hfe do you really need ?
I measured a lot of mine and hfe are in the range 305 to 310.
Looking only at shot noise (neglecting 1/f-noise and assuming there is no popcorn noise) and assuming frequencies well below fT/sqrt(hFE), the RMS equivalent input noise current is sqrt(2*q*IB*f), where q is the elementary charge, IB the base current and f the bandwidth over which you measure. The collector shot noise transformed back to an equivalent RMS input noise voltage is sqrt(2*k^2*T^2/(q*IC)), where k is Boltzmann's constant, T the absolute temperature and IC the collector current.
Suppose you have two similar transistors, one of which has a quarter of the hFE of the other. At equal collector currents, the transistor with the lower hFE then has twice the equivalent input noise current. However, if you optimise the collector current for the given hFE, then you would bias the lower hFE device at half the current. Both the equivalent input noise current and the part of the equivalent input noise voltage that comes from collector shot noise would then be sqrt(2) times worse than for the high hFE device.
So all in all, there is a fourth power root dependence when you optimise the collector current given the hFE.
On top of this all, you get the thermal noise voltage of the base spreading resistance, which is approximately independent of the collector bias current. Besides, base spreading resistance also effectively also adds to the source resistance, thereby increasing the effect of the base shot noise current.
In the 80ties I did a lot of investigations, calculations and simulations.
At the time the 2SB737/2SD786 pair, the BD139/BD140 pair, the 2SA1141/2SC2681 pair and the 2SJ72/2SK147 JFETs was the transistors that gave the best simulated, measured and "listening" results. Thus I ordered those devices in large quantities as sorted (matched for hFE, Idd etc.) with the specifications my simulations, measurements and listenings etc. had revealed as the most optimum for my applications. I had to order 2500 pcs of each the 2SB737/2SD786 as an example to get good unit prices and get them closely matched / sorted. For the BD139/BD140 I only needed to order 500 pcs of each to get them matched / sorted and so on.
In the designs I have used those transistors they have been used in combinations to get the noise, THD and other parameters like I wanted them. By combinations - it can be need for some in parallel, some to drive another, cascades etc. etc..
To get fast and basic results the thermal voltage at room temperature Vt (equals ca. 26mV under normal conditions) can be used. Using the Vt and hFE in calculations gives THD, noise resistance etc. that can be performed with a $10 calculator and gives basic results that are indicative. However slightly different formulas are needed for JFET calculation as they give only half the distortion level a BJT gives under comparable conditions.
I used SPICE simulations, but I discovered first that the simulated results and real life measurements was not coherent when my components and circuits was developing. I tweaked i real life, measured and then simulated to see the effects, but it was obvious that the simulation models and the simulation algorithms was either not advanced enough or made some averaging or had some limits. Then I ended up in a situation where it was impossible to simulate my circuits (completely wrong results vs. the real life measurements) and I waisted a lot (way to much) of time on this.
Later I discovered that I had actually altered the physical environment so the constants used in the simulations and the "constants" in my real life implementations was different.
Regarding shot noise:
Current noise - shot noise was the issue that really caught my attention in simulations.
Not the static current noise / shot noise, but the dynamic - when simulating a circuit with a signal swing.
My first thought was how and why was this related to measurements and fidelity, and then why I could alter the real life current noise / shot noise, but not simulate it...
Later I discovered that these findings actually applies not only to all electric / electronic dependent devices, but also to mechanical devices that creates statical charges etc..
By now I have discovered three different ways / methods to control / alter properties that affects also current noise / shot noise. A fourth way for use in PCB / circuit designs are under investigations / development and the first goal are to reduce clock noise / phase noise / jitter by a factor of 10 to 100 times.
I don't know what simulator you used. With most SPICE-like simulators you can only simulate noise under small-signal conditions, with simulators like Spectre RF you can use the PSS/pnoise analyses to simulate what happens when you have a large periodic signal and a small noise signal in the circuit at the same time (like in an oscillator). Using transient noise simulations in simulators such as Spectre RF, you can even simulate what happens when the noise itself is large.
The former Philips Semiconductors introduced Spectre RF-like analyses in their simulator PStar just before they abandoned PStar, but in my experience they were not yet very reliable. It is a pity that Philips/NXP stopped with PStar, I loved the nice and consistent syntax of PStar input files and the process block approach.
Anyway, regarding distortion simulations: distortion in FET circuits requires very advanced models to get anything sensible out, but decent BJT models have been around for decades, as far as I know.
The former Philips Semiconductors introduced Spectre RF-like analyses in their simulator PStar just before they abandoned PStar, but in my experience they were not yet very reliable. It is a pity that Philips/NXP stopped with PStar, I loved the nice and consistent syntax of PStar input files and the process block approach.
Anyway, regarding distortion simulations: distortion in FET circuits requires very advanced models to get anything sensible out, but decent BJT models have been around for decades, as far as I know.
Simulating noise figures is absolutely useless given that 99,9 percent of transistor models are useless themselves. Not only is the rbb value which is of utmost importance incorrect but also other parameters. Youll have to take your own measurents with curv tracer and create your own models if you want results that resemble anything like a real component.
Hi Manso,
You have a point regarding discrete transistors. The manufacturers often don't bother to characterise and extract base resistance and 1/f noise. I've seen Spice model libraries where each transistor type had 10 ohm base resistance, for example.
What I meant with my remark about decent BJT models is that the models can resemble the behaviour of a real BJT quite closely when the parameters are extracted properly. For FET distortion simulations, the simpler FET models don't resemble the real thing well no matter how you extract the parameters.
Regards,
Marcel
You have a point regarding discrete transistors. The manufacturers often don't bother to characterise and extract base resistance and 1/f noise. I've seen Spice model libraries where each transistor type had 10 ohm base resistance, for example.
What I meant with my remark about decent BJT models is that the models can resemble the behaviour of a real BJT quite closely when the parameters are extracted properly. For FET distortion simulations, the simpler FET models don't resemble the real thing well no matter how you extract the parameters.
Regards,
Marcel
Marcel, I ve havent looked at FET models that closely but you may be right as reading through another thread here a couple of engineers seem to have the same problem.
In the past my employer used a private company specializing in formulating models to supply accurate models especially for japanese BJTs and I see many of the parts are discontinued now. By the looks of the reciepts its very expensive going this route.
In the past my employer used a private company specializing in formulating models to supply accurate models especially for japanese BJTs and I see many of the parts are discontinued now. By the looks of the reciepts its very expensive going this route.
Hi all,
Recently I have done a literature search into the effects of avalanche multiplication that occurs in the collector-base region at high collector-base voltages. For low noise, you definitely have to keep VCE below the specified collector-emitter breakthrough voltage with open base (BVCEO). In the first place, at VCE=BVCEO, you already increase the white current noise by about 3 dB, because avalanche multiplication in the collector-base region then produces as much shot noise as the "normal" base current component. In the second place, modern RF transistors also suffer from increased non-ideal base current and increased 1/f noise after you have biased them at a large current and high collector-emitter voltages (>BVCEO) for a long time. This effect is negligible on older transistors, but it is not for modern RF devices. If you want to know more about it, the key word is mixed-mode stress. By the way, most simulation models don't include avalanche multiplication.
Best regards,
Marcel
Hi again Marcel,
Interesting information you provide here ... I wonder if some of this effect is what is reflected in fig. 2 of the BFU760's datasheet? Above about 2.5 VDC VCE the VCE/IC curve shows an upwards tilt as if the characteristics of the transistor changes ...
I've attached the datasheet (I'd also like to say that I currently don't have time to look more into this phenomenon and so will only briefly follow what may be posted here - just FYI so that you know where I am with this ...)
Greetings
Jesper
Interesting information you provide here ... I wonder if some of this effect is what is reflected in fig. 2 of the BFU760's datasheet? Above about 2.5 VDC VCE the VCE/IC curve shows an upwards tilt as if the characteristics of the transistor changes ...
I've attached the datasheet (I'd also like to say that I currently don't have time to look more into this phenomenon and so will only briefly follow what may be posted here - just FYI so that you know where I am with this ...)
Greetings
Jesper
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Hi again Marcel,
Interesting information you provide here ... I wonder if some of this effect is what is reflected in fig. 2 of the BFU760's datasheet? Above about 2.5 VDC VCE the VCE/IC curve shows an upwards tilt as if the characteristics of the transistor changes ...
I've attached the datasheet (I'd also like to say that I currently don't have time to look more into this phenomenon and so will only briefly follow what may be posted here - just FYI so that you know where I am with this ...)
Greetings
Jesper
Hi Jesper,
Yes, that looks like avalanche multiplication. In fact, if the BVCEO (or V(BR)CEO as they call it) had had the worst-case specified value of 2.8 V, the collector current would go off scale at VCE=2.8 V.
They measure the collector current with a fixed base current. Had they measured it with a fixed base-emitter voltage (and fixed junction temperature), you would see very little increase in collector current and a clear decrease in base current.
I don't know what causes the slow decrease in collector current with increasing VCE for VCE from 0.5 V to 2 V and IB > 60 uA, but I would guess that it is due to self-heating. SiGe transistors often have an hFE that decreases with increasing temperature.
Best regards,
Marcel
This was a very interesting thread too bad it didn't keep going.
I am therefore tying to revive it, hopefully it will pick up again...
My question that I don't think it was covered here, when speaking about choosing the sweet spot for noise performance, it was specified that source resistance has to be determined.
Is it possible to explain. Bit further what is the process that takes to identify the ideal point for a given bjt?
I don't think I have this down very clear!
I am therefore tying to revive it, hopefully it will pick up again...
My question that I don't think it was covered here, when speaking about choosing the sweet spot for noise performance, it was specified that source resistance has to be determined.
Is it possible to explain. Bit further what is the process that takes to identify the ideal point for a given bjt?
I don't think I have this down very clear!
I wonder how the BFU760F is affected by handling and in circuit surges. The capacitances are incredibly low, so using one of these near an interconnect is asking for trouble unless care is taken with diode protection
Remember when National used to advise protection for their integrated low noise transistors?
Remember when National used to advise protection for their integrated low noise transistors?
Assuming that 1/f noise is negligible, that the frequencies are much smaller than fT/sqrt(hFE) and that the source impedance is more or less constant over the frequency band of interest:
1. Determine the impedance of the source plus the base spreading resistance, let's call this Zs'
2. Choose a collector current of IC = kT*sqrt(hFE)/(qZs')
k: Boltzmann's constant, q: elementary charge, T: absolute temperature
At room temperature, kT/q ~= 26 mV, so this simplifies to IC = sqrt(hFE) * 26 mV/Zs'
3. Choose a collector-emitter voltage high enough to keep the transistor out of saturation, yet small enough to make impact ionization negligible. That is, any value between 500 mV and VCEO/2 will do fine.
4. Calculate IC*VCE and compare it to the specified maximum power dissipation of the transistor. If needed, reduce VCE to stay at least a factor of four below the maximum power dissipation so that self-heating will not have too much influence (but still keep it out of saturation).
For RIAA amplifiers working with moving-magnet cartridges, the source impedance is anything but constant over the frequency range of interest, but you can take the impedance at 3852 Hz as a reasonable estimate.
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It is definitely a good idea to put a diode in anti-parallel with the base-emitter junction of any low-noise transistor.
With base resistance or base spreading resistance I mean the resistance of the base material of the transistor. It can be quite small when you choose the right transistor, but it is never 0.
Still, if you had a transistor with zero base spreading resistance, Zs' would be 33.3333... ohm in your example. It is whatever impedance drives the base plus the base spreading resistance. Actually, if you apply series feedback, you also have to add the impedance of the feedback network connected to the emitter.
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