Switching Large amounts of FETs

[fr0st]

Quick question....
For switching lots of fets (2250pf gate capacitance each and there five of them) should I incorperate a extra strage to my PSU which give a extra 10v on my rail voltage and use a bipolar stage for switching them? (like the ESP SMPS)
also is it possible to saturate the transisters by having a 25v base signal and have it switching ~50v?
any better surgestions would be appreciated
Thanks all

[janneman]

How fast do you want to switch them? What do you have available in terms of current, voltage? What's the schematic?

Jan Didden

[subwo1]

Do you have a diagram? Do you mean like the mosfet driver stages here? BTW the junction FET constant current source here needs to be replaced with another type which can handle higher voltage. V9 and V10 could be mosfets with the gates tied to the drains and sources by means of potentiometers and be mounted on the heatsinks for thermal compensation. I don't know if the circuit works since I was only able to simulate it.

[fr0st]

Frequency is about 100khz, Current can be almost anything as i'm just adding windings to a 10kw torroid of a SMPS for a car amp.
its for a class D amp whereby a lm4651 give out a 25v pulse (typically use for a integrated H bridge) @ 100khz to the music and the rail being swithed is about 47v.

As far as I figured I'd have a PNP and NPN on thier respected rails (one GNS the other VCC+10v) driven off the same pulse so that when ones on the others off at all times. The outputs would be tied to the array of fets with each fet having its own charge/discharge resistor. FAirly simialar to the schematic posted.
Is it gonna work?

[janneman]

frOst,

There are many interrelated issues here. The switching freq itself is not as critical as the switching speed. You want to switch the fets fast to avaoid losses, say within 100nSec? (I'm no expert on this, will readily yield to an expert). Then also it is IMPERATIVE that you avoid that both fets are on at the same time because that is a dead short across the supply, probably blowing the fets to smithereens. So you need what is called dead-band: the on-fet switches off, and a small delay later the off-fet switches on.

I would review the other threads on class D, or get in touch with an expert.


Jan Didden

[subwo1]

fr0st,


I am glad you mentioned the gate resistors, the importance of which I failed to mention. I think I see what you are doing.

Sounds like you are going to make quasi H-bridge and you are constructing buffer emitter followers whose bases will get their signal off the drivers for the two mosfets there already. Those two pairs of transistors will then drive the two new mosfets via suitable gate resistors. Sounds like a good idea and quite feasible.

But I suggest you reference the mosfet drive power supplies to the sources of the mosfets being driven, like shown in my diagram. You should be able to add as many windings to the transformer as needed to derive those voltages. Be sure they are regulated to no more than the voltages driving the original mosfets. However, you do not need the biasing diodes I included in my diagram between the bases of the buffer emitter followers for your application. Be sure to take the drive signals for the new mosfets before the gate resistors of the original mosfets. Is the diagram here like what you are doing?

[fr0st]

There are many interrelated issues here. The switching freq itself is not as critical as the switching speed. You want to switch the fets fast to avaoid losses, say within 100nSec? (I'm no expert on this, will readily yield to an expert). Then also it is IMPERATIVE that you avoid that both fets are on at the same time because that is a dead short across the supply, probably blowing the fets to smithereens. So you need what is called dead-band: the on-fet switches off, and a small delay later the off-fet switches on.

The dead time is done at the LM4651, I assume that transisters wouldn't have this problem since they don't have a gate capacitance.
the bipolar stage here is what i'm getting at, except replace the transisters with higher spec'd ones where neccesary and raise the Vcc to 10v above rail. One question is with the fet on the negative supply would te source voltage be 0v (using n channel's) and the drain would be at the negative rail voltage? this would make the voltage needed to switch it on 10v?
Thanks all for your comments
Very much Appreciated

[subwo1]

You would also have to run the SG3525 off of 25 volts so that it could swing voltage to turn the new transistors on all the way.

[fr0st]

This is still buggin me coz I havn't fully got it sorted yet
The main part of the ESP schematic I was refering to was Q1.2.3.4 and M1,2,3,4.
My plan was to instead of the pulse from the 3525 the class D chip signal would be fed to the bipolars. Q1 would have VCC + 10v (in this case 57v) instead of 12v and Q2 would remain grounded. The signal being fed to the base of both bipolars would be the 25v.
disregard the rest of the schematic but the bipolars, mosfets and resistors between.
The total gate capacitance would be ~11nf so most, if not all, mosfet driver IC's are ruled out.
also in regard to transistors, what does it take to fully turn them on?

[subwo1]

Originally posted by fr0st
The signal being fed to the base of both bipolars would be the 25v.

Ok, you lost me when you got to this statement. Do you mean 0 to 47 volts switched high and low?

[i]also in regard to transistors, what does it take to fully turn them on? [/B]

They amplify the current applied to the base, up to point. The gain drops as the current gets higher to where it eventually drops to one. But that can only be for a short burst, like charging and discharging mosfet gates. otherwise they will blow.

You can get faster switching times by using low voltage transistors and bootstrapping their power supplies so that the NPN collector always stays just 12 volts above the source of the upper mosfet as it turns on and off, it pulls the power supply for the emitter follower pair (both NPN and PNP) with it. Every time the the lower mosfet turns on it pulls the source of upper mosfet low and a diode connected to the lower 12v supply charges a capacitor for the supply which floats with the upper mosfet and is referenced to its source. Like how the upper power supply is gotten here.

http://www.irf.com/product-info/data...ata/ir2110.pdf