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Old 23rd July 2003, 02:36 PM   #11
Gunders is offline Gunders  Norway
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Join Date: Nov 2002
Location: Norway
Thanks bocka....

I'm thankful for all the input I can get about SPICE.
I agree that I shouldn't be depended of SPICE simulation alone, but as a beginner and an EE student I think its a bit interesting to see how the different paramaters affect the results and which parameters which affect what(sorry for my bad english here, but hopefully you understand anyway).
So these days I'm fiddling with the I-V curves for simple diode models, chaning N a bit.. see the differences, changing EG... hmm, no difference, what if I change EG and temperature???
Well, so I'm just playing around with SPICE models these days and hopefully I learn a bit.

Many of the students in my class don't bother much about analog design, they say that it's just to simulate the circuit and if it works it's okay, if it dont.. use the trial and error method.
I don't agree very much with them, I think it's important to have knowledge about which parameters that it's important for the spesific deisgn and how they affect the result.
Parameters like BF, VAR, BR, NE may not be important in many applications, but it may be that TF, CJE (some kind of high-frequency circuit maybe?) and other parameters is important.
I think that knowledge about this is important to be a good designer.
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Old 23rd July 2003, 04:36 PM   #12
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Default Yes....... bother!

"Parameter variation from -70% to +200% is normal with FETs so don't bother."

I don't think so. If you read the data sheet and know which Idss group you are designing with, the above statment is very suspect and I find it kind of ridiculous.

With Spice modeling the models are very important and many programs allow one to vary the parts spead to allow for tolerance and device parameter spead. Comparison between actual measurements of simple circuit with the device, and the results of Spice simulation model early in the design process is highly recommended. There are even vendors who will develope models based on the actual physical part that you supply them but it cost a lot of money.

http://www.spice-club.com/en/index.asp

Monte Carlo analysis in Spice
http://www.google.com/search?hl=en&l...=Google+Search
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Old 23rd July 2003, 07:46 PM   #13
bocka is offline bocka  Germany
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Default parameter spread and rugged design

Look into the datasheet of a 2SK389 and you'll find that the IDss varies from 2.6 ma to 20 ma. Of course they are classified to 3 groups, but this range is 7mA -70%/+200%, I can't see what is suspect from this view, it's a fact. And not all FETs are classified, you will simply find some ones (the PN4393 for expample) which have no classification.

After many years of simulation with Spice (and also using the old 2e6 simulators) I can find that working with a rugged and stable topology parameter spread does not have many effects on your circuit.

When your looking at this spice model

*SRC=2SK389;QSK389;JFETs N;Gen. Purpose;50V 10mA
.MODEL QSK389 NJF (VTO=-2 BETA=20M LAMBDA=600U RD=7
+ RS=6.3 IS=1.58F PB=1 FC=.5 CGS=19.5P CGD=5.5P)

and compare it to the datasheet you find the gate cut off voltage is in the range of -2.0V to -0.15V (BTW again the parameter range -70%/+200%). So this model (VTO = -2V) is far away from the "middle" of a typical FET (typical values are from -0.4V to -0.9V). And this parameter is not classified. There is only one parameter, witch is nearly independent from IDss classification: Forward Transfer Admittance.

I highly agree with you Fred that using the results of Spice simulation model early in the design process is very usefull. I use it for my hobby builing audio equipment and for my professional work. But don't believe everything SPICE is telling you, SPICE shows you what will not work, not the other way round. If someone's playing around with SPICE and hope this will work with discretes in real you should build it and test it. And learn what will work and what not. And what a rugged design is.

Currently I'm using SPICE and the JFET models for a filter design. This filter works, I have build it and have not used SPICE for this design. A monolitic integrated dual JFET in an input stage of a differential amp do not have many effects of parameter spread regardless of IDss. This amp or better said these amps are build from parts laying around, no classification used. Now I'm optimising this amps (the filter curve at high frequencies) thats why I'm using SPICE here.

If anyone is interested: Use an op-amp model of your choice, build a low-pass filter (second or third order) with cut-off frequency of about 1MHz, make an AC-analysis, look what will happen and if it's what you've expected. And do not use LTSpice/Switcher-CAD.
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Old 24th July 2003, 09:25 AM   #14
bocka is offline bocka  Germany
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Hi,

I've made some simulation between the different 2SJ109/2SK389 models in simulation. The first simulation is made with the models I've posted the next two ones with Fred models.

Input signal is a 2,5ma swing current source (like a PCM1738 DAC)

VDB(1) is the differential signal between non inverting and inverting inputs of the discrete op-amp

VDB(2) is the voltage at the output of the discrete OP-Amp

VDB(3) is the voltage at the output of the low pass filter.

As you can see there are only very minor differences between the different models. The following netlist is used:




DAC-Filter 3rd 2SJ/SK pair

.AC DEC 20 10 200e6

VSupply1 101 0 28
VSupply2 102 0 -28

* Stimulus
Iin1 1 0 AC 0.00248 SIN(0 0.1 500)

* use FETAMP macromodel as discrete amp
Xop1 0 1 101 102 2 0 FETAMP

R4 2 3 220
C4 2 3 1e-12

R5 1 3 1000
C5 1 3 1e-12

C1 1 5 3.3e-9
R1 2 5 1

C2 6 0 6.8e-9
R2 3 6 0.4

C3 1 4 6.8e-9
R3 4 0 0.4



* CONNECTIONS: NON-INVERTING INPUT
* | INVERTING INPUT
* | | POSITIVE POWER SUPPLY
* | | | NEGATIVE POWER SUPPLY
* | | | | OUTPUT
* | | | | | GND
* | | | | | |
.SUBCKT FETAMP 1 2 3 4 5 20
J1 3 1 6 J2SK389
J2 12 2 6 J2SK389
Q1 6 7 8 ZTX653
Vbias1 7 4 4.7
R1 8 4 680
R2 12 3 680

J3 4 1 9 J2SJ109
J4 13 2 9 J2SJ109
Q2 9 10 11 ZTX753
Vbias2 3 10 4.7
R3 3 11 680
R4 13 4 680

Q3 14 10 12 ZTX753
Q4 14 7 13 ZTX653
CComp2 14 20 220e-12

Q5 3 14 5 FZT692B
Q6 5 7 15 FZT692B
R10 15 4 220

.model J2sj109 PJF(Beta=39.21m Rs=0 Rd=0 Betatce=-.5 Lambda=4.338m Vto=-.5762
+ Vtotc=-2.5m Cgd=67.64p M=.2562 Pb=.3905 Fc=.5 Cgs=61.12p
+ Isr=158.7p Nr=2 Is=15.87p N=1 Xti=3 Alpha=10u Vk=100
+ Kf=109.9E-18 Af=1)

.model J2sk389 NJF(Beta=51.76m Rs=8.008 Rd=8.008 Betatce=-.5 Lambda=11.22m
+ Vto=-.5275 Vtotc=-2.5m Cgd=18.28p M=.3367 Pb=.3905 Fc=.5
+ Cgs=20.07p Isr=112.8p Nr=2 Is=11.28p N=1 Xti=3 Alpha=10u Vk=100
+ Kf=92.85E-18 Af=1)

.MODEL ZTX653 NPN IS =3.8206E-13 NF =1.0025 BF =250 IKF=1.15 VAF=154
+ ISE=1.035E-13 NE =1.3642 NR =1.0012 BR =50 IKR=0.42 VAR=38
+ ISC=7E-13 NC =1.19 RB =0.04 RE =0.0875 RC =0.06
+ CJC=45.5E-12 MJC=0.4534 VJC=0.5774 CJE=278E-12
+ TF =0.78E-9 TR =30E-9

.MODEL ZTX753 PNP IS =3.2007E-13 NF =1.0041 BF =200 IKF=1.6 VAF=76
+ ISE=8E-14 NE =1.57 NR =1.0008 BR =33 IKR=0.45 VAR=51
+ ISC=6E-14 NC =1.079 RB =0.087 RE =0.08 RC =0.07
+ CJC=80E-12 MJC=0.4896 VJC=0.7676 CJE=350E-12
+ TF =0.86E-9 TR =24E-9

.MODEL FZT692B NPN IS =1.87E-12 NF =.9983 BF =1400 IKF=0.73 VAF=29
+ISE=.21E-12 NE =1.378 NR =.997 BR =68 IKR=.55 VAR=12 ISC=.44E-12
+NC =1.14 RB =.2 RE =.05 RC =.048 CJC=42.5E-12 MJC=.475 VJC=.625
+CJE=233E-12 TF =.77E-9 TR =39E-9

.ENDS

.print AC) vdb(1) vdb(3) vdb(2)

Feel free to modify the op-amp to see whats happen.
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Old 24th July 2003, 09:31 AM   #15
bocka is offline bocka  Germany
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Default simulation results

Here you can find the zip-files:

Spice simulation results
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Old 2nd August 2003, 02:26 PM   #16
jcx is offline jcx  United States
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Default Re SwitcherCAD III

Quote:
Originally posted by bocka
...make an AC-analysis, look what will happen and if it's what you've expected. And do not use LTSpice/Switcher-CAD.
are you referring to a SwCAD III problem? (current ver 2.04 7/17/03) - I am switching to SwCAD from OrCad 9.1 demo and would really like to know of any bugs

in any SPICE .AC analysis can be misleading, it linearizes the circuit at the operating point and just plots the linear transfer function response, no simulation is going on, the signal levels can be anything without regard to ps voltage/current limits, device saturation, ect.

in any active filter design the op amp must have plenty of gain at the frequencies where you want the filter curve to be determined by the passive components, MHz active filters generally require 100 MHz op amps
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Old 23rd November 2003, 02:00 PM   #17
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there is a newer switcherCAD on linear's site -- as of November 17 -- and there is also a new model library for Linear OpAmps.

http://www.linear.com/software/
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