pcb layout for powering 24 THAT 1240 chips

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Hi folks,

I am building a 24 channel active summing bus with differential inputs using the THAT 1240 opamp chip as a balanced line input. This is my first time designing for a pcb (I'm using express pcb). I was hoping that some of you pcb vetrans could shed some light on designing.

The pcb itself is 3" x 12" and there are two rows of 12 chips. Each chip need a 18V bipolar DC supply as well as a signal ground and a "chassis" ground trace for the shields of the TRS input jacks.

I am unsure about the best way to supply the power. Should I run one main, wide trace/buss for all the 24 chips so should I run say, one buss for every four chips?

Each chip has a quiescient current draw of 2mA with max at 2.8mA.

Thanks in advance!
 
I have just been doing something very similar (A multichannel ADC in my case) using the 1203 as an input stage.

In my case I have just run the power buses below the chips down the back of the board and brought the power up via a couple of vias next to each chip, decoupling is on the component side obviously (This thing is heavy on the smt).

Assuming all the IO is balanced, you want the sleeve of those jacks connected as directly as possible to the case, using the sort of jack that has metal to metal contact with the mounting hole works well, and adding a common mode choke also helps matters.

I would advise reading AES-48 before even considering bringing the cable screen onto the PCB (sometimes you have no choice, but real care is advised).

That paper (Combined with the papers from Tony Waldron in the compliance journal) caused me a serious rethink on the right way to build balanced IO, and the results do now work MUCH better.

Regards, Dan.
 
Hey Dan, thanks for bringing up the pin 1 shielding issue. I've read a couple of papers regarding the problem of bringing in he shield into the chassis. As far as the power supply rails are concerned, I've decided to use power and ground planes. It will be more expensive but well worth it I think.

As far as the shielding of pin one is concerned, I'm really torn. I would like to terminate it right at the chassis but I would also like the option to have a ground lift by means of a jumper. Then again, that means the shield will have to be introduced into the pcb. The Dangerous 2 bus seems to do just that and I have not heard any problems with it.

By the way where can I find the AES-48 paper? I don't have an AES membership or anything. If I do decide to bring the shield into the chassis what kind of care needs to be taken?

So far I have ground/power planes. Vcc and Vee pins are decoupled with 100nF ceramic caps. The pin 1 is introduced into the pcb (1" away from the back panel of the chassis. From there I'll use a short wire to connect to the chassis by means of a screw for each 4 TRS jacks. This way I'll have the option of a ground lift as well as tying pin 1 to signal ground.

Hows the ADC design working out for you?
 
The adc looks to be working out OK, it is basically a data sheet design using THAT1203/OPA1632/PCM2402, so nothing really special, except I am trying to cram 8 channels worth onto a 100 * 160 eurocard (Ideally with all parts on one side). It remains to be seen if carting sclk across a ribbon cable from the backplane will sound reasonable or if I need to add a local VCXO based pll.
The plan is to accommodate up to three input cards (Analogue or AES-3) and up to three output cards (As above), plus GPIO and loads of RS232 in a 2U diskless box.

One inch of lead wire will re radiate mobile phone signals inside your box quite happily, personally, I would do it right and just use bodge jumpers for interfacing kit that gets it horribly wrong.
IMHO, under no circumstances is connecting pin one to signal ground on the board the right thing to do.

Incidentally, the Kitagawa SBC-75 series common mode chokes have a handy combination of cheap and reasonable common mode performance, I like them.

I think Tonys pages here:http://www.tonywaldron.co.uk/ probably contain most of the meat of the AES-48 standard in a reasonably digestible form.

Regards, Dan.
 
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