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Old 31st December 2011, 05:54 PM   #441
a.wayne is offline a.wayne  United States
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Just remember Sy knows all



Yeah , but he speaks in Null ................. .......
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Old 31st December 2011, 05:57 PM   #442
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Originally Posted by ThorstenL View Post
Sy,

Propagation delay in typical Op-Amp type structures is several microseconds, even fully uncompensated comparators usually have propagation delays in the 100's of nanoseconds.

Ciao T
Better tell the guys doing 40G Ethernet, we have plenty of comparators with 10's of femto-sec delay. There are dozens of op-amps with nsec closed loop delay, maybe your talking about open-loop? Please explain, input on fig below was applied slightly after 10ns (I could get an exact number)?

I think I should stay out of this tired topic. The confusion of accumulated phase vs true delay (non-minimum phase portion) just keeps coming up just like the feedback going around and around.
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Old 31st December 2011, 06:23 PM   #443
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Let me try to explain the problem of delay vs feedback, if I can. First of all, a NON-COMPENSATED open loop amp would be fairly fast, uS to nS, fast enough for just about everybody. However, when you add DOMINANT POLE COMPENSATION, the open loop delay usually gets VERY LONG. Now, why do we NOT see this delay with the application of lots of feedback? The application of feedback, SHORTENS the effective delay by OVERDRIVING the input stage. This moves the bandwidth from, let's say: 10 Hz to 1MHz, for example. This also increases the internal transient overshoot, 100,000 times, as well. Gee, think that there might be a potential problem, at least sometimes?
The original mathematics for this was best expressed by Daugherty (sp) and Greiner, in an IEEE paper in 1966. Anybody have this article? Great math, originally footnoted by Otala in 1970, in one of his papers.
In a 'nutshell' the input stage is 'overdriven' by whatever it takes to get the output to match the input, to the extent of how much global loop feedback you are applying, up to the limit of slew rate limiting, when the model fails.
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Old 31st December 2011, 06:27 PM   #444
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Originally Posted by a.wayne View Post
Not following you Sy ..... WaveB ...Modulation ..?
Yep.

Suppose you have an American football (non-round). In order to make it round (linear) you squeeze it. What happens to it's width? The same happens with vectors when you correct amplitude and frequency response using feedback.
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Old 31st December 2011, 06:29 PM   #445
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Interesting, Wavebourn.
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Old 31st December 2011, 06:29 PM   #446
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Originally Posted by scott wurcer View Post
I think I should stay out of this tired topic. The confusion of accumulated phase vs true delay (non-minimum phase portion) just keeps coming up just like the feedback going around and around.
No need to confuse: true delay as well is caused by inertia.
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Old 31st December 2011, 06:47 PM   #447
SY is offline SY  United States
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Originally Posted by scott wurcer View Post
The confusion of accumulated phase vs true delay (non-minimum phase portion) just keeps coming up just like the feedback going around and around.
Truer words... but if you allow that people can redefine standard terms any way they like, what the heck, that's democracy.
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Old 31st December 2011, 06:56 PM   #448
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Interesting, Wavebourn.
Actually, it is rather 3-d snail than a ball.

Edit: but I believe 3-d math modeling can be used to represent amplitude, phase, and frequency dependence of gain. It would be interesting and useful, to show people who have no scientific background in electronics.
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Old 31st December 2011, 07:00 PM   #449
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Scott,

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Originally Posted by scott wurcer View Post
Better tell the guys doing 40G Ethernet, we have plenty of comparators with 10's of femto-sec delay. There are dozens of op-amps with nsec closed loop delay, maybe your talking about open-loop?
There are many interesting things, though those femtosecond delay comprators must have escaped my notice. What is the part number?

Also, for your plot, what is the part number?

Ciao T
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Old 31st December 2011, 07:23 PM   #450
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Scott,



There are many interesting things, though those femtosecond delay comprators must have escaped my notice. What is the part number?

Also, for your plot, what is the part number?

Ciao T
I just grabbed an AD8099 plot there are faster. The comparators/lim-amps are buried inside networking products, one will be featured in Jan. Electronics Products (I'm under gag order)

EDIT - Maxim part, 1nsec
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