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Old 10th April 2012, 09:32 AM   #11
qusp is offline qusp  Australia
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ahh ok, well the schematic is more incomplete than I thought =), i'm not going to try and decipher it further. I thought you had mostly left out the power supply and by post regulator I mean I figured there might be more different and perhaps lower voltages needed than marked on the header for various relay drivers, comparators, logic etc, not so easy to follow multi layer PCB without schematic.

I had mistaken the soic8 and surrounding parts around C20, C12 etc (the only parts I can easily see) and similar collections, in particular around DA8 and DA15 as opamp and comparator based linear regs after composite CL filters.

but I see its more complicated than that =D
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Old 10th April 2012, 10:22 AM   #12
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Quote:
Originally Posted by rjm View Post
By the way, how difficult was it to get the circuit to run stable, and how did you check?
I have started from SPICE model with general "parasitic" elements like capacitance across resistors, inductance across capacitors etc. and have found good estimation which guarantee good phase margin. Also I studied the sensitivity of schematic for the change of values, including "parasitics".
On practice, 30% increasing of only one capacitor has need to reach necessary conditions (comparing with model). You can see transient response curve of real amplifier on picture above.
In common case, "composite" topologies are difficult to tune due to complex impact of one parameter on another. Especially if we want high amplification at the internal feedback loop, more than the general amplification of "composite" amplifier.
This approach allows us to reach very high parameters - the "error" amp is working in small signal mode. So you can choose high precision low noise op amp. In this case overall characteristics combine the precision of input amp and speed/current of output amp.
The use of inverted topology give us additional benefits. In this case "error" amplifier is working with zero common mode voltage. This trick prevents "capacitance modulation" distortions in input stage of "error" amp. There is only one limitation - noise. So you can choose optimum input impedance. Very low input impedance would load the output of previous stage. High input impedance would be the source of noise (it would multiplied on input current noise of op amp). My opinion for most cases - impedance must be few kilo-Ohms for bipolar op amps.
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