J-Mo Mk II headphone amplifier

[rjm]

Everyone wants to get rid of the output coupling cap. I tried. At the end of the day I don't think its worth the effort - if you want direct coupled output, a complementary buffer stage using bipolars is simply the easier way to go. Been there, done that. With the single-ended MOSFET buffer, I'm prepared to live with the coupling cap as part of the baggage that comes with using this particular topology.

As a result of the parameter spread as well as the thermal drift, FETs are a headache. Bias networks and AC coupling caps are the Aspirin. Any circuit that relies on these FET parameters to set something reliably is asking for trouble. That's one of the reasons why I'm being extra careful with the paper-build before I even bother to order some parts and play around.

Latest LTspice results appended. This is the version optimized around the 4V Vp 2N5486. It's a relatively chunky FET and all the currents are increased accordingly. As far as the distortion calculations go, however, the results are identical with the 2N5485 optimized circuit: what I considered the point just before the onset of hard clipping, output 3dB (2V pp) into 16 ohms, gives -26 dB 2nd harmonic (~~5% THD). That's 120 mW or so output power. The harmonic progression is textbook simple, as expected for a single ended circuit.

Once slighty away from hard clipping, the distortion spectrum cleans up significantly with a falling progression of 2nd, 3rd and 4th harmonics, each peak -25 dB below the last.

At 1/10th the output voltage (1 mW output power) the 2nd harmonic is under -73 dB, so even though the simulation doesn't compute it, the 3rd harmonic is about -100 dB and everything else is in forget-about-it territory.

Simulations like this are pretty useless except to show problems. The conclusion from the above is that it's basically sound.

[rjm]

A fairer, and more correct assessment of the performance away from clipping is the 2nd harmonic is always about -50 dB lower than the fundamental, so the THD is 0.3 %, pretty much independent of output power. 90% of that is second harmonic. 3rd order and higher harmonics total about 0.03%.

The 0.3% 2nd harmonic is relatively high and probably colors the sound. This is most likely a characteristic of the MOSFET + source resistor single-ended output topology, and explains the mellow, distinctive sound of headphone amplifiers based on it.

[rjm]

Updated ltspice file attached.

Spent some time figuring out how much tolerance I have in the JFET parameters, and which model JFETs can be used.

The restriction is I want a particular gain, I want the trim resistor R3 to be within range, and I want about 5 mA total current running through the input circuit (i.e. R4).

The other point is the JFET has to be a current, widely available model.

In the end I chose the J112. The J202 is a perfectly good substitute, and, in a nod to the original circuit, a 2N4416 can be also be used also if one takes into account the old school TO-18 package. All those should yield a decent proportion of useable devices.

The circuit shows a test jig that can be used when matching and testing JFETs. Bias the FET with a 2.2k source resistor and the source should autobias up to a voltage that is some statistical scatter. Anything in the range of 1.9-2.5 V (optimal is 2.1 V) should work in the main circuit just relying on R3 to make the final adjustement. The closer the JFETs can be matched between channels, the better.

The final word for now is: this is a nice update to the original, adding full 12 dB of gain and optimizing (as best as possible) for the full range of headphone impedances at the cost of only one additional transistor and - this is important - no loss of performance. The noise and distortion of both circuits are determined almost entirely by the MOSFET stage, and, just like the Szekeres they are based on, are not great. It's intrinsic to way this circuit works that there is a lot of 2nd harmonic distortion. These headphone amps are about achieving a nice, pleasant tone rather than the last word in transparency.

[rjm]

Eagle .sch file attached. No .brd file yet, you are one your own there...

Schematic has some extra resistors added, some are for safety and some are for stability, some like R1 and R6 are probably not needed, but don't hurt.

R11OPT provides an optional set of pads when using a TO-247 package resistor for R11. Replace as needed if you want to use those Vishay RTO-20 power resistors or similar.

[rjm]

I'm holding a competition for the design of the board layout. Winner gets a set of fully assembled boards.

Deadline is April 2nd, 2012.

Pimp My Board Contest

[rjm]

Update on JFET parameters.

I'm matching devices by simply putting 2k2 on the source, grounding the gate, and applying 10V or so on the drain. The source auto-biases up to a voltage V, and I'm looking for sets around V= 2 V, implying a working current of 1 mA.

So far the J202's I bought run a little lean, V= 1.3 V, while the 2N5486's almost perfect at V = 2.5 V. The scatter on the 2N5486s is fairly broad however, but it's not too hard to get pairs within 100 mV.

[Avro Arrow]

I'll give it a shot.

Originally Posted by rjm

I'm holding a competition for the design of the board layout. Winner gets a set of fully assembled boards.

Deadline is April 2nd, 2012.

Pimp My Board Contest

[rjm]

Some thought on the power supply.

Circuit V+ calls for 20 V and 400 mA with a maximum ripple of about 10 mV.

(The PSRR is only about 40 dB, which along with a maximum allowable output ripple of 0.1 mV dictates that the V+ ripple should be no more than 10 mV.)

A capacitance input filter is impractical. ~~150,000 uF required. A CLC or LC filter is doable, but you are looking at a 1kg chunk of Hammond iron. (c.f. 159Y 600 mH 11 ohm).

The simplest route is CRC, C=4,700uF, R=10 ohms. The voltage drop is about 1-2 V, so the power transformer secondary winding should be about 15-16 VAC. I would probably use an 80 VA toroid.

A voltage regulator or capacitance multiplier is also possible, but it's worth keeping in mind that each volt dropped across the regulator dissipates almost 200 mW per channel. Vin = 30V, Vout=20V is 4W of heat for a stereo circuit. Modest heatsinking will be needed. (in the order of 10 C/W or better).

Options run from a 16V, 20V or 24V switching supply (common and cheap, sound horrible) to the LM317T (boring! sound is average) to a Z-reg, to a capacitance multiplier.

I would like to use my standard power supply modules (160VA 2x12VAC). This, in series, gives 28 V rectified. (I live in Japan, 100V line, so the output is 15% less than you'd expect since my transformers are 2x115 primary).

I'm leaning towards a MOSFET based Z-reg. Just because the gate voltage is conveniently 24V, i.e. 2x 12V zeners, which I have already. And the IRF510 I already have because it's part of the JMo2 circuit.

This amp, because of the low PSRR, lives and dies by it's power supply.

The fun part, though, is it's easy to swap different regulator/filter stages in and out, and see what works best.

[rjm]

It's for the solder to hit the iron. I'm gonna go build a prototype.

[rjm]

Note on JFET matching

J202, 10V, Rs=2.2k, 25 samples

Bias current was found to range from 0.507 mA to 0.582 mA. The average is 0.55 mA, std. dev. is 0.02 mA.

From 25 samples, it is possible to obtain 7 pairs matched within 0.5%, or 11 pairs matched within 1%. Clear sailing.

The distribution is a truncated shape, clearly the parts have been "binned". Lower and higher current parts have been removed to end up as J201 or J203, respectively. The J202 parts tend to cluster towards the high current end, which helps when it comes to finding closely matched pairs.