Dxvideo said:
It looks like you did damage the MOSFET - it is easy if you do not observe antistatic precautions carefully. If the gate is broken you would have a big leakage current through the gate. That is what the zener for - to protect the gate. Do not remove it. Replace the MOSFET and this time be careful - at the very least put a strip of foil or a copper wire around the pins of the MOSFET before handling and soldering it in to the circuit and do not forget to remove it after you've soldered it in.
Cheers
Alex
Dear friends,
I found my mistake finally. I havent tried yet but, when I am adding the capacitor between op-amps output and MOSFET s gate, the op-amps feedback resistors was in the front of that cap. So the bias voltage always at 0 volts because of the feedback resistor goes to the gnd via just one 1K as you can see in the schematic. And my pull up and pull down resistos are about 100K levels. So I couldnt adjust +4v point. Tomorrow I will fix the problem. And report you the results.
However I am still confused, how it was working under that situation. The sound was really incredible!
This is the mistaken connection;
I found my mistake finally. I havent tried yet but, when I am adding the capacitor between op-amps output and MOSFET s gate, the op-amps feedback resistors was in the front of that cap. So the bias voltage always at 0 volts because of the feedback resistor goes to the gnd via just one 1K as you can see in the schematic. And my pull up and pull down resistos are about 100K levels. So I couldnt adjust +4v point. Tomorrow I will fix the problem. And report you the results.
However I am still confused, how it was working under that situation. The sound was really incredible!
This is the mistaken connection;
An externally hosted image should be here but it was not working when we last tested it.
AndrewT said:
That was the intention yes. Did you spot any errors?
Yes, but I think all variants so far will clip assymetrically anyway. The MOSFET gate must be biased at least 3 or 4 Volts above ground. Maybe one could get rid of that problem in some cases if keeping the output cap, but the idea was it could be omitted in my version although I kept it in the schematic.
Hi Christer,
I see no errors in post20.
But what about a couple of changes?
Take the speaker/headphone return to Vcc instead of to ground.
Replace R2 with a constant current sink (somewhere between 100mA and 200mA).
Maybe add a 2mA sink from pin6 to Vee to convert the opamp to single ended output stage.
Now, we have a truly constant current amplifier where the load current in the supply rails does not vary with signal level, provided the single ended stages do not clip.
Adding one DC blocking capacitor to pin 3 and a couple of resistors converts the whole amp to single polarity power supply. Just connect the grounds to Vee, in the correct order.
I see no errors in post20.
But what about a couple of changes?
Take the speaker/headphone return to Vcc instead of to ground.
Replace R2 with a constant current sink (somewhere between 100mA and 200mA).
Maybe add a 2mA sink from pin6 to Vee to convert the opamp to single ended output stage.
Now, we have a truly constant current amplifier where the load current in the supply rails does not vary with signal level, provided the single ended stages do not clip.
Adding one DC blocking capacitor to pin 3 and a couple of resistors converts the whole amp to single polarity power supply. Just connect the grounds to Vee, in the correct order.
Hi,
it might help understand what is happening if you use the standard rule for opamps:
the output tries to settle at a voltage so that the two input pins are at the same voltage.
Now working back from that statement.
If the two input pins are both at zero volts, then you can work forward through the resistors to calculate what DC voltages need to be at the various points to get the circuit to be DC stable.
This will result in the output cap sitting at -Vgs.
If instead you work backwards from the output and assume zero volts at the source pin, then what voltage will appear on opamp pin2. Now using that same rule what voltage must pin3 be biassed to? This can be done with three resistors and a DC blocking cap.
Once you understand what the circuit is supposed to do then it becomes easier to design it to make it do what you need.
it might help understand what is happening if you use the standard rule for opamps:
the output tries to settle at a voltage so that the two input pins are at the same voltage.
Now working back from that statement.
If the two input pins are both at zero volts, then you can work forward through the resistors to calculate what DC voltages need to be at the various points to get the circuit to be DC stable.
This will result in the output cap sitting at -Vgs.
If instead you work backwards from the output and assume zero volts at the source pin, then what voltage will appear on opamp pin2. Now using that same rule what voltage must pin3 be biassed to? This can be done with three resistors and a DC blocking cap.
Once you understand what the circuit is supposed to do then it becomes easier to design it to make it do what you need.
Hi all,
I am fixed the unadjustable bias problem. Its now +4v and the offset on output is about 0v.
But now I have the unstability problem. DC offset voltage always swinging. I wait until the MOSFET comes to 55 C for bias adjusting. However while the temperature was stable output DC offset was still decreasing. And I had to put the 1500uF on output again.
But the sound is beatiful. No noise or distortion. The mids and trebles are very detailed. And the basses are impressive!
I am fixed the unadjustable bias problem. Its now +4v and the offset on output is about 0v.
But now I have the unstability problem. DC offset voltage always swinging. I wait until the MOSFET comes to 55 C for bias adjusting. However while the temperature was stable output DC offset was still decreasing. And I had to put the 1500uF on output again.
But the sound is beatiful. No noise or distortion. The mids and trebles are very detailed. And the basses are impressive!
This is the last situation of the circuit;
It works fine and HOT! But there is -2mV offset on each channel after warming up.
Do you think that make problem?
An externally hosted image should be here but it was not working when we last tested it.
It works fine and HOT! But there is -2mV offset on each channel after warming up.
Do you think that make problem?
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