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Old 11th January 2013, 11:05 PM   #31
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Old 11th January 2013, 11:59 PM   #32
acko is offline acko  Australia
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Thank you all for the support! Looks like we have reached the min 20 quickly and I will finalise the design for review and then off to fab. I will leave the GB open for a while until certain matters have been fully clarified.

Gathering from all you queries I will now respond in stages to each in the order posted:

1. Parts are available form Digikey or Mouser. I am keeping track and cross-checking as I go along. Will give a cost estimate on parts shortly. There are a few 0603 parts and not too small smd ICs to solder, so standard tools will do.

2. I did mention ESS DACs only mainly because of the way the re-clock MCK on the board is derived. At 834KHz the Amanero bit clock (BCK) goes up to max 24.756MHz. To re-clock this successfully requires re-clock frequencies much higher. I have mentioned this in my R&D thread and also GLT has nailed this very nicely:
Synchronous Reclocking? H i F i D U I N O

So I have put is at ~50MHz which is the upper limit of a 9023 DAC. The 9012/16/18 can take even higher at up to 100MHz to do it even better. I am not sure if other DACs can handle this level, so the reason for excluding them. There is not need get synchronous types like 49.576MHz or 98.304MHz as this is an Async re-clocking design.

The Amanero MCK is discarded (as it has to go through the isolators anyway). ESS DACs on their own clocks for Async mode
Other DACs may require sync MCK from transport

The DSD Active signal from Amanero is also discarded as the ESS DACs can auto-detect source formats.

More to come ...
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Old 12th January 2013, 01:02 AM   #33
acko is offline acko  Australia
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Quote:
Originally Posted by acko View Post
...... At 834KHz ......
Sorry meant 384KHz, got a bit dyslexic on the run!
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Old 12th January 2013, 05:16 AM   #34
acko is offline acko  Australia
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Default App Notes - Amanero Isolator Re-Clocker

Quote:
Originally Posted by qusp View Post
... I didnt clarify, so it cant be fed any external clock circuit from the target dac?
The intended plan is to connect the ESS DAC Master Clock to the Re-Clock input (MCK) of this board. In this way the re-clocked signals are lined up with the DAC master clock. I would think in some ways this has some synchronous effect- shall we say "pseudo-synchronous" re-clocking.

On the other hand you can also drive this board with a totally independent clock that meets the timing requirements indicated earlier. DAC has its own separate clock - completely Ansync mode. So there are options here and maybe other DACs can be also used this way....
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Old 12th January 2013, 07:33 AM   #35
acko is offline acko  Australia
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Designed to physically match the Amanero as shown. Could also be used connect to other transports like WaveIO, EX2UI, Hiface for similar benefits. Wire in the inputs.
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File Type: png AKL-AMN-S Prev.PNG (19.3 KB, 985 views)
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Old 12th January 2013, 08:30 AM   #36
LuisMCP is offline LuisMCP  Spain
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Old 12th January 2013, 09:58 AM   #37
qusp is offline qusp  Australia
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Quote:
Originally Posted by acko View Post
The intended plan is to connect the ESS DAC Master Clock to the Re-Clock input (MCK) of this board. In this way the re-clocked signals are lined up with the DAC master clock. I would think in some ways this has some synchronous effect- shall we say "pseudo-synchronous" re-clocking.

On the other hand you can also drive this board with a totally independent clock that meets the timing requirements indicated earlier. DAC has its own separate clock - completely Ansync mode. So there are options here and maybe other DACs can be also used this way....
Cool, thats what I figured, but from an earlier post of yours someone may think it was just for ESS. I wanted to clear that up for myself as well as those here who may have hesitated to join. It may well have been me misreading your post in the ackodac main thread as applying to this board when you were referring to the teflon/turboclock version.

I would just call it plain synchronous reclocking. its asynchronous wrt the input clock in so far as it is cleaned up and the entire stream offset in time by a flop, or is it a flip?, but the relationship of MCLK, FS, BCK, Sdata remain unchanged (other than it may be closer to the ideal)

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I may just get the teflon version but i'll throw my name in the hat for now

Last edited by qusp; 12th January 2013 at 10:00 AM.
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Old 12th January 2013, 10:45 AM   #38
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Me too.

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NicMac, Italy x2
xtomm, Czech Republic x1
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Lil' Knight, VN x1
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Old 12th January 2013, 11:24 AM   #39
meintan is offline meintan  Singapore
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Old 12th January 2013, 12:08 PM   #40
acko is offline acko  Australia
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Default MCK Reclock?

Quote:
Originally Posted by acko View Post
The Amanero MCK is discarded (as it has to go through the isolators anyway). ESS DACs on their own clocks for Async mode
Other DACs may require sync MCK from transport
Hmmm... why discard this when we can also reclock the MCK from transport. In this way we can achieve fully synchronous operation (with DAC driven from this MCK). Then other DACs can be used also
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