PCB adopter from DF1704 to SM5813 (digital filter) - diyAudio
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Old 24th November 2012, 01:29 PM   #1
JarekC is offline JarekC  Poland
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Join Date: Nov 2004
Location: Krakow
Default PCB adopter from DF1704 to SM5813 (digital filter)

Hi,

In one of the projects on Polish DIY audio forum (DAC project WM8804-SM5813-AD1865) we tray to replace old digital filter SM5813 to newer DF1704.
Because we want to play 24/96.

Ready to buy adapters are expensive, so we decided to build your own.
I designed PCB for adapter (all funcion of DF1704 are configured by solder jumpers). Additionally, there is place for 2 capacitors and reset chip MCP100.

PCB cost will be about 3$-4$ + shipping.

If anybody interested the spreadsheet is here:
https://docs.google.com/spreadsheet/...3NNMUVsUWZudWc

GB for PCB is worldwide, for DF1704 only for Poland.
GB will be closed 30.11.2012

Best regards
JarekC
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Old 27th November 2012, 03:19 PM   #2
JarekC is offline JarekC  Poland
diyAudio Member
 
Join Date: Nov 2004
Location: Krakow
Hi,
Yet the scheme. Maybe someone in the future will need this adapter.

Best regards
JarekC
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Old 19th December 2012, 08:29 AM   #3
JarekC is offline JarekC  Poland
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Join Date: Nov 2004
Location: Krakow
Hi,

PCBs are ready.

Best regards
JarekC
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Old 29th April 2013, 07:32 PM   #4
JarekC is offline JarekC  Poland
diyAudio Member
 
Join Date: Nov 2004
Location: Krakow
Hi,

I received a few requests about the availability of PCB.
Now PCBs are sold out.

I can reopen GB but minimum order is 15 pcs.

Best regards
JarekC
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Old 6th June 2013, 09:39 AM   #5
vzs is online now vzs  Europe
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Join Date: Dec 2005
Location: Cluj-Napoca, Romania
Hi JarekC,

Did you or others from the Polish DIY forum managed to test AD1865 with DF1704 at higher sample rates: 88.2/96KHz? and maybe did some measurements?

I'm asking this because I'm concerned about timing constraints of AD1865 that I'm facing in another project.

Let me briefly explain my concerns:
According to AD1865 datasheet page-7, figure-9 the clock period timing should be >74.1ns which means <13.5MHz, while DF1704 datasheet page-8 says that BCKO is fixed at 256fs or 192fs which is 24.576MHz or 18.432MHz for 96KHz - both much higher then what AD1865 timing diagram asks for.

On the other hand in AD1865 datasheet same page-7 says: "The minimum clock rate of the AD1865 is at least 13.5 MHz" which is in contrast with the timing diagram of CLK period >74.1ns.

I myself can run AD1865 with CLK up to 24.576MHz but don't have measuring instruments to test whether it's working correctly or it's missing some bits.

Thanks,
Zsolt
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