Assuming you referred to v2.6, to my ears, I couldn't hear any difference from the C8 change. Correction to C32 orientation had a much bigger impact. C12 is soldered at the back.
In the build guide/BOM sent by Subbu, both C8 and C12 are 1uF, not 0.001uF (assuming you did mean 0,001 as 0.001uF). Both spec as C1210 package which is right for the pads. In an earlier BOM, C8 was 0.01uF with C0805 package.
In the build guide/BOM sent by Subbu, both C8 and C12 are 1uF, not 0.001uF (assuming you did mean 0,001 as 0.001uF). Both spec as C1210 package which is right for the pads. In an earlier BOM, C8 was 0.01uF with C0805 package.
Don't have the schematic where I am now but MIC5205 should definitely not have ceramic caps at the outputs. They will oscillate easily with ceramic caps at their outputs ! Tantals should be used at the outputs and also for decouping the XO. At the inputs so the +5V side there is not a problem so you can use ceramic caps at the inputs of MIC5205.
I see the trouble of info getting lost that was posted weeks/months ago....A central page with technical info would be a solution.
I see the trouble of info getting lost that was posted weeks/months ago....A central page with technical info would be a solution.
HI GUYS, NEED HELP..
I'M CURRENTLY ON THE GROUP BUY FOR THE SUBBU V3 AND ALSO THE IAN I2S SPDIF FIFO.
I NEED HELP ON HOW TO INTEGRATE THE SPDIF FIFO WITH I2S OUPUT (SD, WS, SCK) TO THE SUBBU BOARD. THE FIFO I2S OUT HAS 3 WIRES FOR (SD, WS, SCK).
WHERE DOES THE WIRES FROM 12S FIFO OUT CONNECTS TO THE SUBBU DAC?
THANKS
I'M CURRENTLY ON THE GROUP BUY FOR THE SUBBU V3 AND ALSO THE IAN I2S SPDIF FIFO.
I NEED HELP ON HOW TO INTEGRATE THE SPDIF FIFO WITH I2S OUPUT (SD, WS, SCK) TO THE SUBBU BOARD. THE FIFO I2S OUT HAS 3 WIRES FOR (SD, WS, SCK).
WHERE DOES THE WIRES FROM 12S FIFO OUT CONNECTS TO THE SUBBU DAC?
THANKS
If the I2S connection on the V3.0 is the same as the V2.6 then you can try these:
SD -> R9 (DATA)
WS ->R7 (BCLK)
SCK ->R8 (LRCK)
Clip from the MIC5205 datasheet for recommendation on output capacitor:
Output Capacitor
An output capacitor is required between OUT and GND to prevent oscillation. The minimum size of the output capacitor is dependent upon whether a reference bypass capacitor is used. 1.0μF minimum is recommended when CBYP is not used (see Figure 2). 2.2μF minimum is recommended when CBYP is 470pF (see Figure 1). Larger values improve the regulator’s transient response. The output capacitor value may be increased without limit.
The output capacitor should have an ESR (effective series resistance) of about 5Ω or less and a resonant frequency above 1MHz. Ultra-low-ESR capacitors can cause a low amplitude oscillation on the output and/or underdamped transient response. Most tantalum or aluminum electrolytic capacitors are adequate; film types will work, but are more expensive. Since many aluminum electrolytics have electrolytes that freeze at about –30°C, solid tantalums are recommended for operation below –25°C.
Output Capacitor
An output capacitor is required between OUT and GND to prevent oscillation. The minimum size of the output capacitor is dependent upon whether a reference bypass capacitor is used. 1.0μF minimum is recommended when CBYP is not used (see Figure 2). 2.2μF minimum is recommended when CBYP is 470pF (see Figure 1). Larger values improve the regulator’s transient response. The output capacitor value may be increased without limit.
The output capacitor should have an ESR (effective series resistance) of about 5Ω or less and a resonant frequency above 1MHz. Ultra-low-ESR capacitors can cause a low amplitude oscillation on the output and/or underdamped transient response. Most tantalum or aluminum electrolytic capacitors are adequate; film types will work, but are more expensive. Since many aluminum electrolytics have electrolytes that freeze at about –30°C, solid tantalums are recommended for operation below –25°C.
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