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Old 6th March 2011, 04:07 PM   #121
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I was wondering, if this card is using asio drivers then it is not possible to delay the audio on separate channels anymore? (for use in cinema mode).

If not is there a IC that is dedicated to delay the i2s signals?
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Old 7th March 2011, 08:37 AM   #122
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Location: Tampere Finland Europe
Quote:
Originally Posted by exa065 View Post
Hi Everyone,

I’ve been working on a new design for 8-channel Asynchronous USB to I2S interface. It started as a fun project and eventually became more involving than just a hobby. A couple of friends joined in and helped with the development of bit-perfect ASIO driver covering all sampling rates up to 352.8 kHz. At the present time I am testing it with a ES9018 DAC.

Here are the details:
• Sampling frequencies (kHz): 44.1, 48, 88.2, 96, 176.4, 192, 352.8
• Resolution (bits): 16, 24, 32
• 8, 4 or 2 channels for sampling rates up to 192 kHz
• 4 or 2 channels for 352.8 kHz
• Galvanic isolation between the USB ground and the I2S outputs.
• Two quartz oscillators for the 44.1 kHz and 48 kHz sampling rate groups
• FPGA implementation
• 256 kB FIFO buffer to support asynchronous operation
• Two analogue voltage regulators with filters
• Sample rate LED indicators
• USB power LED indicator
• Buffer level LED indicator
• Four I2S data outputs (8 channels) powered by the DAC power supply (3.3V or 5V)
• USB 2.0 interface, Mini USB connector
• Proprietary bit-perfect ASIO driver completely independent from the Windows sound system; No software volume control or mixing.
• ASIO driver implements automatic sampling rate switching; no re-sampling
• Works on Windows XP, Windows Vista and Windows 7.
• Tested with Foobar and J.River Media Center
• Project homepage – www.exadevices.com > Home

I am about to make the USB to I2S interface commercially available as a kit.

Any feedback is highly appreciated.
No I2S inputs, why?

Also using FIFO is also problem as you don't really know exactly the output sample position (unless the FPGA somehow reports it to ASIO). Is the FIFO interface an 8-bit wide - using FTDI USB-parallel FIFO module perhaps? Alternatively you could use dual-ported SRAM on FPGA. Will the USB-FPGA protocol be open source? Also how about the FPGA configuration (Verilog/VHDL)?

Which FPGA brand you are using btw (Xilinx / Altera / some other)?

Also some people have suggested a crossover application, could you just implement some biquads in FPGA, they have usually some amount of 18x18 bit hardware multipliers, and you could configure them via USB? Also you could implement the lip synch delay likewise.

Also regarding the I2S connector I would like to see a connector which doesn't have built-in antennas - I mean the connector used is not suited well for handling high frequency signals. It would be better to use something like HDMI connectors (http://www.psaudio.com/ps/products/d...twave-i2s?cat=) or at least standard IDC flat cable connectors designed for high speed (maybe with LVDS).

Last edited by mhelin; 7th March 2011 at 09:00 AM.
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Old 7th March 2011, 04:12 PM   #123
rsdio is offline rsdio  United States
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Quote:
Originally Posted by egberttheone View Post
I was wondering, if this card is using asio drivers then it is not possible to delay the audio on separate channels anymore? (for use in cinema mode).

If not is there a IC that is dedicated to delay the i2s signals?
You could handle this sort of feature in computer software on the USB host far cheaper than a custom board. But if you want to design a circuit board between the USB-to-I2C with this feature then have fun! There isn't a precise chip for delay, except perhaps a FIFO, but even that would require support circuitry.
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Old 7th March 2011, 04:19 PM   #124
exa065 is offline exa065  Canada
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I would like to comment on the various questions about the choice of technology and features of exaU2I. This device is designed to solve the “missing link” issue for mastering-grade multichannel playback from a computer. Our approach is minimalistic. We believe that when it comes to faithful reproduction of sound, less is more. Our quest was to remove any optional features and limitations caused by conventional technologies and consumer standards. We aimed to create a baseline product that is completely transparent. Users can implement any additional processing using external software and hardware.

This product will appeal only to people that are not satisfied with the ‘statu quo” and are looking for alternative solutions. After all, to achieve different results you must do something different.

Our choice of driver technology and proprietary hardware implementation perfectly serves the design goals for the project. In our experience this environment produced the best results. We realize that using the Windows operating system and a less known driver interface will narrow the market for the initial release of exaU2I.

The discussion on this thread has been very helpful in identifying the needs and priorities for future versions of the product. OS X drivers are the top development priority.
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Old 7th March 2011, 04:48 PM   #125
exa065 is offline exa065  Canada
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Quote:
Originally Posted by mhelin View Post
No I2S inputs, why?
The FPGA core code and the ASIO driver will not be open source. For the initial release there will be no provisions to reprogram the FPGA with custom functions. Implementation of delays is on the to-do list. I wouldn’t worry about the antennas. Our simulations and real-life measurements show that this connector is fine. I agree, it doesn’t look professional. Earlier in this thread we discussed a high-end alternative. We will also make the board available without the connector. exaU2I should be used only with short internal cables – less than 10cm.
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Old 7th March 2011, 06:46 PM   #126
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Quote:
Originally Posted by rsdio View Post
You could handle this sort of feature in computer software on the USB host far cheaper than a custom board. But if you want to design a circuit board between the USB-to-I2C with this feature then have fun! There isn't a precise chip for delay, except perhaps a FIFO, but even that would require support circuitry.
I tought ASIO drivers are going to bypass all these layers (like volume settings). If there is no chip for I2S delay then i need to use a DSP to do the trick.
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Old 8th March 2011, 03:18 AM   #127
qusp is offline qusp  Australia
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yes, any software that can also use asio will work for crossover, if asio bypassed every piece of software you could use, it really wouldnt be terribly useful itself
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Old 8th March 2011, 03:42 PM   #128
Koenjer is offline Koenjer  Netherlands
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Quote:
Originally Posted by exa065 View Post
The FPGA core code and the ASIO driver will not be open source. For the initial release there will be no provisions to reprogram the FPGA with custom functions. Implementation of delays is on the to-do list. I wouldn’t worry about the antennas. Our simulations and real-life measurements show that this connector is fine. I agree, it doesn’t look professional. Earlier in this thread we discussed a high-end alternative. We will also make the board available without the connector. exaU2I should be used only with short internal cables – less than 10cm.
Hi Exa,

Any news on availability?
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Old 9th March 2011, 04:40 AM   #129
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Originally Posted by exa065 View Post
Our approach is minimalistic.
Aye, resist feature creep and ship it.
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Old 9th March 2011, 07:00 AM   #130
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Quote:
Originally Posted by egberttheone View Post
I tought ASIO drivers are going to bypass all these layers (like volume settings). If there is no chip for I2S delay then i need to use a DSP to do the trick.
There exists dedicated I2S lipsync delays. Small chips meaning difficult to solder and need a microcontroller anyway for adjusting the delay. Well there are some which doesn't need I2C control like this:
http://focus.ti.com/lit/ds/symlink/tpa5052.pdf
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