Need help with Spice simulation
Need help with P-spice simulation
I am in the process of tweaking my Pioneer CDP. I want to make the machine sounds brighter and looking to alter the analog output/filter stage of the CDP. I am trying to simulate the analog output/filter stage of the player with Protel DXP and have encountered some problems.
The circuit of the output stage is as below. V1- V4 are the output of the DAC chip for one channel. A transistor connection to the point between R19 & C7 for DEMP, these are not shown.
While activating the simulation, I encountered Syntax error with one line of the netlist. The simulation would not proceed.
This is the first time I am using a simulation software, I do not know what is going on. Please advise me.
I attach the Advanced Schematic Binary(.schdoc) and the netlist(.nsx) files.
The error is at the line 99 of the netlist file: BEGND 99 0 V=0.5*V(3)+0.5*V(4)
The program, Protel DXP, can also save the schematic in other format such as Advanced Schematic ascii(.sch.doc), Schematic binary(.sch), Orcad schematic (.sch) and a few other. Please let me know if you need this.
The files are zipped up:
http://www.geocities.com/overmindxx/Pioneer.zip
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