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Old 31st October 2010, 07:48 PM   #1
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Default Simulating a ir2110/3 in pspice

Hi all,

For my first thread I have decided to post one of my sideline projects instead of a purely audio related topic. This is very similar to what the class-D guys do so I was hoping some of you might help me out.

I am using OrCad Capture CIS 10.3 to simulate a ir2113 driving a full bridge inverter. The .lib file for the ir2113 was downloaded from International Rectifier website. I have allready built the circuit physically and it works perfectly.

However now that I am trying to simulate the circuit it keeps telling me that it has a "convergence problem in bias point calculation" and I cant figure out why. I have tried rebuilding the circuit with the minimum of components but to no avail. If I am making a connection error I am staring into my own error repeatedly.

Does anyone have any idea on what I am doing wrong?
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Old 14th January 2011, 06:11 PM   #2
sekanix is offline sekanix  Spain
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>Just try to change Abstol parameter in your simulation .options to 1u (default 1p) and also try to activate "use GMIN stepping to improve convergence"

good luck
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