HP3577A Phase and Gain margin measurements
For the past 3 years or so I’ve been developing an upgrade for our Audiolab MDAC design – the MDAC2.
I plan to manufacture the PCB’s in Europe on a small scale and limit the number of PCB’s to 200 to 250 Pcs. The purpose of the project is to research and developed one of the world highest performance DAC’s – I've no interest in mass production of PCB’s.
I wanted to expand my abilities as a designer, as an “old School” designer I’m from the generations of designers before cheap computer power and Spice simulation. I really need to get to grips with Spice to be able to jump to the next level of sophistication and performance, I’m not interested in connecting “Data Sheet” designs together that’s just cheap design and boring.
I’m still no expert in Spice, but it’s certainly been a very educational “tool” and I’ve really expended my understandings of analogue electronics – but how accurate are the simulation results? – I guess the real question should be how accurate are the component models (and my skill as a Spice designer).
The new MDAC2 design incorporates a host of “unique” circuit blocks (atleast for me). I could only attempt there design as Spice simulation “held my hand” allowing be to prove and debug my “crazy” ideas with a level of confidence before I committed to the PCB design.
While THD and noise etc. are easy to measure on the prototype designs, my biggest fear is the real world Phase and Gain margins – but how to confirm the simulation results on real hardware?
The biggest problem with performing Gain / Phase measurements is breaking the feedback loop to inject the stimulus signal (most Amplifiers & PSU designs will not operate open-loop without latching-up or damage).
HP published an application note for the HP3577A Network analyses 03577-5131
https://dl.dropboxusercontent.com/u/86116171/3577-5131.pdf
The clever part of the App note is the use of a Current probe (HP1110B) to inject the stimulus into the FB loop while still keeping a “DC path” keeping the loop closed.
The HP Application note shows the analyzers connected between internal Gain stages of an amplifier design – but I don’t see as being practical in typical audio amplifier designs without affecting the circuit parameters we are trying to measure, typical interstage impedances are fairly high. I’m not sure why HP did not couple the stimulus at the most obvious node – between the Output stage and its feedback node.
The important considerations of the Current Probe technique are:-
1. In order to work correctly, the Probe must be used at a point where the driving impedance is quite low compared to the load impedance. (HP suggests “a point between two amplifier stages will usually fit this requirement”).
As I mentioned earlier, I’m not sure why HP does not suggest the most obvious node, that is to intersect the circuit path between the output stage and the input feedback node – it would seem to meet the above requirement.
2. Because the probe is an inductive device, its response rolls off sharply at low frequencies, thus the test signal coupling becomes quite poor below about 1KHz.
3. The efficiency of this current injection scheme is generally poor. In order to couple enough signal into the loop for adequate SNR, it might be necessary to thread the pickup wire through the probe cavity several times.
I used a HP1110A, and wrapped 3 turns though its core – I managed to get decent result from about 5KHz upwards – I’m not really that concerned about the total gain at LF so this limitation is OK. The lack of transformer coupling efficiency at LF was most likely compounded by the fact I used 1.5GHz 10:1 Active voltage probes for the Reference and Sense nodes.
One thing that caught me out with the HP3577 is that the resolution Bandwidth is not automatically coupled to the sweep time, I got some very confusing results at lower Res BW settings (1Hz and 10Hz) until I increased the sweep time to about 60 Seconds. Unlike most spectrum analysers I've used in the past there is no “UnCalibrated” warning message when the selected sweep time is too short for the Resolution BW.
Here’s the test setup:-
https://dl.dropboxusercontent.com/u/86116171/MDAC2 V1 OPS PM Lab Setup2.JPG
A close up of the probes on the test PCB:-
https://dl.dropboxusercontent.com/u/86116171/MDAC2 V1 OPS PM Lab setup1.JPG
The resultant Phase and Gain margins:-
The problem is that ATM most of the measured results are apart from the Spice simulations.
Phase Margin results:-
Simulated:- 79.2Deg @ 4.11MHz Unity Gain intersection
Measured:- 43.37Deg @4.254MHz Unity Gain intersection
Gain Margin results:-
Simulated:- 11.8dB, 0Deg intersection point @ 29.1MHz
Measured:- 4.536dB, 0Deg intersection point @ 7.52MHz
Interestingly the simulated and measured PM Unity gain frequency intersection points are very close (around 4.2MHz), but the Phase margin result is totally off.
Yes – the measured Gain and Phase margins are poor.
At this stage I’m not sure if it’s a measurement error – or the hardware results are valid. I'm suspicious of the measured results as the design is very stable into capacitive loads – more so then could be expected from such “poor” PM & GM stability margin results…
I’m surprised and a little concerned as to how far apart my simulated and measured results are. While I can easily increase the compensation to increase the stability margins – I’d like to understand where the error is. I suspect I'm looking at the phase plots of the reference port then the signal port... I’ll spend more time with the system tomorrow.
Has anyone else any experience of measured verses simulated PM results, I don't believe the Spice models are so poor - what is suspicious is that the unity gain crossover point is close to spice predictions, so phase must also be somewhere in the correct ball park... the more I consider it, must have setup the analyser incorrectly...
Despite my odd results at the moment, I hope it will encourage those with a HP3577 to try to perform and cross check Phase and Gain margin results
For the past 3 years or so I’ve been developing an upgrade for our Audiolab MDAC design – the MDAC2.
I plan to manufacture the PCB’s in Europe on a small scale and limit the number of PCB’s to 200 to 250 Pcs. The purpose of the project is to research and developed one of the world highest performance DAC’s – I've no interest in mass production of PCB’s.
I wanted to expand my abilities as a designer, as an “old School” designer I’m from the generations of designers before cheap computer power and Spice simulation. I really need to get to grips with Spice to be able to jump to the next level of sophistication and performance, I’m not interested in connecting “Data Sheet” designs together that’s just cheap design and boring.
I’m still no expert in Spice, but it’s certainly been a very educational “tool” and I’ve really expended my understandings of analogue electronics – but how accurate are the simulation results? – I guess the real question should be how accurate are the component models (and my skill as a Spice designer).
The new MDAC2 design incorporates a host of “unique” circuit blocks (atleast for me). I could only attempt there design as Spice simulation “held my hand” allowing be to prove and debug my “crazy” ideas with a level of confidence before I committed to the PCB design.
While THD and noise etc. are easy to measure on the prototype designs, my biggest fear is the real world Phase and Gain margins – but how to confirm the simulation results on real hardware?
The biggest problem with performing Gain / Phase measurements is breaking the feedback loop to inject the stimulus signal (most Amplifiers & PSU designs will not operate open-loop without latching-up or damage).
HP published an application note for the HP3577A Network analyses 03577-5131
https://dl.dropboxusercontent.com/u/86116171/3577-5131.pdf
The clever part of the App note is the use of a Current probe (HP1110B) to inject the stimulus into the FB loop while still keeping a “DC path” keeping the loop closed.
The HP Application note shows the analyzers connected between internal Gain stages of an amplifier design – but I don’t see as being practical in typical audio amplifier designs without affecting the circuit parameters we are trying to measure, typical interstage impedances are fairly high. I’m not sure why HP did not couple the stimulus at the most obvious node – between the Output stage and its feedback node.
The important considerations of the Current Probe technique are:-
1. In order to work correctly, the Probe must be used at a point where the driving impedance is quite low compared to the load impedance. (HP suggests “a point between two amplifier stages will usually fit this requirement”).
As I mentioned earlier, I’m not sure why HP does not suggest the most obvious node, that is to intersect the circuit path between the output stage and the input feedback node – it would seem to meet the above requirement.
2. Because the probe is an inductive device, its response rolls off sharply at low frequencies, thus the test signal coupling becomes quite poor below about 1KHz.
3. The efficiency of this current injection scheme is generally poor. In order to couple enough signal into the loop for adequate SNR, it might be necessary to thread the pickup wire through the probe cavity several times.
I used a HP1110A, and wrapped 3 turns though its core – I managed to get decent result from about 5KHz upwards – I’m not really that concerned about the total gain at LF so this limitation is OK. The lack of transformer coupling efficiency at LF was most likely compounded by the fact I used 1.5GHz 10:1 Active voltage probes for the Reference and Sense nodes.
One thing that caught me out with the HP3577 is that the resolution Bandwidth is not automatically coupled to the sweep time, I got some very confusing results at lower Res BW settings (1Hz and 10Hz) until I increased the sweep time to about 60 Seconds. Unlike most spectrum analysers I've used in the past there is no “UnCalibrated” warning message when the selected sweep time is too short for the Resolution BW.
Here’s the test setup:-
https://dl.dropboxusercontent.com/u/86116171/MDAC2 V1 OPS PM Lab Setup2.JPG
A close up of the probes on the test PCB:-
https://dl.dropboxusercontent.com/u/86116171/MDAC2 V1 OPS PM Lab setup1.JPG
The resultant Phase and Gain margins:-
An externally hosted image should be here but it was not working when we last tested it.
An externally hosted image should be here but it was not working when we last tested it.
The problem is that ATM most of the measured results are apart from the Spice simulations.
Phase Margin results:-
Simulated:- 79.2Deg @ 4.11MHz Unity Gain intersection
Measured:- 43.37Deg @4.254MHz Unity Gain intersection
Gain Margin results:-
Simulated:- 11.8dB, 0Deg intersection point @ 29.1MHz
Measured:- 4.536dB, 0Deg intersection point @ 7.52MHz
Interestingly the simulated and measured PM Unity gain frequency intersection points are very close (around 4.2MHz), but the Phase margin result is totally off.
Yes – the measured Gain and Phase margins are poor.
At this stage I’m not sure if it’s a measurement error – or the hardware results are valid. I'm suspicious of the measured results as the design is very stable into capacitive loads – more so then could be expected from such “poor” PM & GM stability margin results…
I’m surprised and a little concerned as to how far apart my simulated and measured results are. While I can easily increase the compensation to increase the stability margins – I’d like to understand where the error is. I suspect I'm looking at the phase plots of the reference port then the signal port... I’ll spend more time with the system tomorrow.
Has anyone else any experience of measured verses simulated PM results, I don't believe the Spice models are so poor - what is suspicious is that the unity gain crossover point is close to spice predictions, so phase must also be somewhere in the correct ball park... the more I consider it, must have setup the analyser incorrectly...
Despite my odd results at the moment, I hope it will encourage those with a HP3577 to try to perform and cross check Phase and Gain margin results
Last edited:
mostly theory - I haven't spent much time with my new toys
http://www.diyaudio.com/forums/soli...ign-6th-edition-douglas-self-post4014989.html
http://www.diyaudio.com/forums/solid-state/269698-question-about-tmc-post4224191.html
designing the loop coupling xfmr for the frequency range, managing its and the connection of it to the circuit added parasitics looks like a project itself
you really want good response for more than a decade either side of the measurement frequency
so a 3 decade xfmr would just be adequate - and which afaik isn't that easy - may have to use xfmrs optimaized for different decades
or potentially improve the result with the analyzer's calibration options and measured xfmr response
there are lots of detail to the probe location, what you need to measure too for stability - Hurst, Tian, Middlebrook are good search terms for loop measurements
and don't give free manufacturer's Spice models too much credit - op amp, transistor models are often poor, and board/trace adds often unmodeled parasitics
http://www.diyaudio.com/forums/soli...ign-6th-edition-douglas-self-post4014989.html
http://www.diyaudio.com/forums/solid-state/269698-question-about-tmc-post4224191.html
designing the loop coupling xfmr for the frequency range, managing its and the connection of it to the circuit added parasitics looks like a project itself
you really want good response for more than a decade either side of the measurement frequency
so a 3 decade xfmr would just be adequate - and which afaik isn't that easy - may have to use xfmrs optimaized for different decades
or potentially improve the result with the analyzer's calibration options and measured xfmr response
there are lots of detail to the probe location, what you need to measure too for stability - Hurst, Tian, Middlebrook are good search terms for loop measurements
and don't give free manufacturer's Spice models too much credit - op amp, transistor models are often poor, and board/trace adds often unmodeled parasitics
Last edited:
jcx,
I thought about this, but the advantage of the multi port Vector network analysers is that you have a reference input as well as a measurement channel (in fact the 3577 has 3 identical input channels, the reference input this reference input serves to automatically compensates and linearises the stimulus signal coupled into the measurement node - and A & B Input channels.
Thinking about it, I wonder if the analyser takes into consideration the amplitude but also the Phase of the reference node surely it must! ???
I tried adding both device and PCB parasitics but nothing seem to come close to closing the gap between Simulation and measured results.
The design is purely discrete so no simplified device models - but it could be the transistor models - oh did I mention I use MOSFET's in the output stage... although I did add external capacitors to approximate internal junction capacitances.... again with little effect.
I don't like the fact the analysers screen shot indicates "R" for the Phase plot, while "UDF" which I read as "Undefined" for the Gain plot.... I think its time to read the 3577 manual...
I thought about this, but the advantage of the multi port Vector network analysers is that you have a reference input as well as a measurement channel (in fact the 3577 has 3 identical input channels, the reference input this reference input serves to automatically compensates and linearises the stimulus signal coupled into the measurement node - and A & B Input channels.
Thinking about it, I wonder if the analyser takes into consideration the amplitude but also the Phase of the reference node surely it must! ???
I tried adding both device and PCB parasitics but nothing seem to come close to closing the gap between Simulation and measured results.
The design is purely discrete so no simplified device models - but it could be the transistor models - oh did I mention I use MOSFET's in the output stage... although I did add external capacitors to approximate internal junction capacitances.... again with little effect.
I don't like the fact the analysers screen shot indicates "R" for the Phase plot, while "UDF" which I read as "Undefined" for the Gain plot.... I think its time to read the 3577 manual...
I have an Anritsu bought at auction last month - means I'm mostly reading HP/Agilent lit to understand the measurement theory - so far I'm just thinking of it as a really good LCR meter
I'd change feedback ratio, compensation to see how the trace moves in comparison with the same changes in sim
and Waly's refs, the Minicircuits or custom xfmrs look like good ideas too
I'd change feedback ratio, compensation to see how the trace moves in comparison with the same changes in sim
and Waly's refs, the Minicircuits or custom xfmrs look like good ideas too
Last edited:
With a little more reflection, I believe the Phase plot is correctly referenced as it indicates 90Deg across the expected BW....
I'm starting to gain more confidence in the measured results (sadly), unless the current probe B/W is the limitation - but I'd expect it to be compensated by the Reference node input...
I'll play some more to see what I can learn... but I'll be very disappointed with the simulations if they are so incorrect (unless I've made a PCB design or population error).
I'm starting to gain more confidence in the measured results (sadly), unless the current probe B/W is the limitation - but I'd expect it to be compensated by the Reference node input...
I'll play some more to see what I can learn... but I'll be very disappointed with the simulations if they are so incorrect (unless I've made a PCB design or population error).
I'm now getting more sensible results
Dominik the "Other half" of the MDAC 2 man design team made a rather obvious suggestion to perform Phase / Margin tests on a known device.
So I selected a AD711 dating back in the good old days when manufactures would publish in depth data sheets with all important curves - including Phase and Gain margins.
Sure enough the Phase was 40dB or so to low - with this extra insight it turns out the Tektronix P6243 1GHz active probes where the root problem. I'm at a loss as why the probes caused such an issue - being rated to 1GHz I would have expect there Phase to be flat so low down at around 10MHz.
I'm on the Lab PC, once i get onto my main system I can post plots of the results.
While the MDAC2 output stage design still does not match the simulated results - (with an unloaded output a PM of 57.3Deg), the results are now within the correct ball park, I'm now inclined to place greater trust in the measurement system especially as the AD711 tests results are very close to the published curves (once the Active probes had been replaced with direct wire connection to the Analyser).
I'm rather chuffed that it now appears I have the ability to directly measure Phase & Gain margins, which will be rather critical for the MDAC2 as it incorporates multiple nested feedback loops in its Analogue stage hence my eagerness to confirm the simulation results!
Dominik the "Other half" of the MDAC 2 man design team
made a rather obvious suggestion to perform Phase / Margin tests on a known device.So I selected a AD711 dating back in the good old days when manufactures would publish in depth data sheets with all important curves - including Phase and Gain margins.
Sure enough the Phase was 40dB or so to low - with this extra insight it turns out the Tektronix P6243 1GHz active probes where the root problem. I'm at a loss as why the probes caused such an issue - being rated to 1GHz I would have expect there Phase to be flat so low down at around 10MHz.
I'm on the Lab PC, once i get onto my main system I can post plots of the results.
While the MDAC2 output stage design still does not match the simulated results - (with an unloaded output a PM of 57.3Deg), the results are now within the correct ball park, I'm now inclined to place greater trust in the measurement system especially as the AD711 tests results are very close to the published curves (once the Active probes had been replaced with direct wire connection to the Analyser).
I'm rather chuffed that it now appears I have the ability to directly measure Phase & Gain margins, which will be rather critical for the MDAC2 as it incorporates multiple nested feedback loops in its Analogue stage hence my eagerness to confirm the simulation results!
I guess that this is a rather specialised thread subject on the measuring Gain and Phase margins with the HP3577, but I'll keep posting here as hopefully it will be helpful for others outside of the DIYaudio forum who reach here via a search engine.
I personally found VERY little available to be able on the internet to practically measure the Gain / Phase margin of a design - which considering how critical it is for reliable & safe performance is rather surprising.
I had more musings on the Current probe measurement technique as my measured results are still 16dB off from the simulated results, but far more importantly the bench measurements don't seem follow the behaviour is see while playing with the simulator.
A key factor for this measurement technique to work correctly is that these is some inherent isolation between the Reference and Sense nodes.
From the HP Paper:-
1. In order to work correctly, the Probe must be used at a point where the driving impedance is quite low compared to the load impedance. (HP suggests “a point between two amplifier stages will usually fit this requirement”).
OK, call me rather slow, but the native output impedance of a typical output stage will be "high" beyond the Unity Gain point (Feedback can no longer act to reduce the output impedance), and this is exactly the area that we are most concerned about.
Simulations suggest that at 4.2MHz (the measured & Simulated UG point ) the output stage impedance is 0.72ohms and 0.816 ohms at 10MHz.
https://dl.dropboxusercontent.com/u/86116171/MDAC2 MOSFET V1 OPS Impedance plot.jpg
To read the plot, the output stage is stimulated via a 1 ohm resistor, so -20dB would be 0.1 Ohm, -40dB 0.01 Ohm etc.
(Note that This is just the output stage impedance, the final output impedance of the MDAC2 will be much lower as the analogue stage is a nested feedback design, so this is just the performance of the "first loop" as it where).
What is I believe might be need is a Unity gain Buffer with extended BW, say to 100MHz to isolate the Sense node (OPS output node) and the following injection point via the current probe.
So long as the buffer has significantly greater BW then our expected Phase and Gain crossover region of interest and with no Peaking and flat phase, then inserting it within the feedback loop should cause no problem - maybe a Current FB opmp would be ideal here.
I personally found VERY little available to be able on the internet to practically measure the Gain / Phase margin of a design - which considering how critical it is for reliable & safe performance is rather surprising.
I had more musings on the Current probe measurement technique as my measured results are still 16dB off from the simulated results, but far more importantly the bench measurements don't seem follow the behaviour is see while playing with the simulator.
A key factor for this measurement technique to work correctly is that these is some inherent isolation between the Reference and Sense nodes.
From the HP Paper:-
1. In order to work correctly, the Probe must be used at a point where the driving impedance is quite low compared to the load impedance. (HP suggests “a point between two amplifier stages will usually fit this requirement”).
OK, call me rather slow, but the native output impedance of a typical output stage will be "high" beyond the Unity Gain point (Feedback can no longer act to reduce the output impedance), and this is exactly the area that we are most concerned about.
Simulations suggest that at 4.2MHz (the measured & Simulated UG point ) the output stage impedance is 0.72ohms and 0.816 ohms at 10MHz.
https://dl.dropboxusercontent.com/u/86116171/MDAC2 MOSFET V1 OPS Impedance plot.jpg
To read the plot, the output stage is stimulated via a 1 ohm resistor, so -20dB would be 0.1 Ohm, -40dB 0.01 Ohm etc.
(Note that This is just the output stage impedance, the final output impedance of the MDAC2 will be much lower as the analogue stage is a nested feedback design, so this is just the performance of the "first loop" as it where).
What is I believe might be need is a Unity gain Buffer with extended BW, say to 100MHz to isolate the Sense node (OPS output node) and the following injection point via the current probe.
So long as the buffer has significantly greater BW then our expected Phase and Gain crossover region of interest and with no Peaking and flat phase, then inserting it within the feedback loop should cause no problem - maybe a Current FB opmp would be ideal here.
Last edited:
Heres the AD711 test setup:-
https://dl.dropboxusercontent.com/u/86116171/IMG_6681.JPG
Ignore the tube test circuit, I'm still unpacking the lab and this is the first piece of copper clad PCB I could find...
https://dl.dropboxusercontent.com/u/86116171/IMG_6681.JPG
Ignore the tube test circuit, I'm still unpacking the lab and this is the first piece of copper clad PCB I could find...
Your being kind , we call it a Rats Nesting!
When I was young I always used to watch my father build these Rats nest in ore - now its all surface mount and that's just no fun!
Copper Clad PCB is a good way to quickly test circuits with decent RF performance - Veroboard I used as a kid is no good for any kind of RF work.
I had a crazy idea for a "new" tube topology - I first simulated and it promised amazingly good performance so I built this Rats nest for real hardware test - still very decent performance for a tube circuit 0.00035% THD with not much effort and very simple design.
, we call it a Rats Nesting!When I was young I always used to watch my father build these Rats nest in ore - now its all surface mount and that's just no fun!
Copper Clad PCB is a good way to quickly test circuits with decent RF performance - Veroboard I used as a kid is no good for any kind of RF work.
I had a crazy idea for a "new" tube topology - I first simulated and it promised amazingly good performance so I built this Rats nest for real hardware test - still very decent performance for a tube circuit
0.00035% THD with not much effort and very simple design.An externally hosted image should be here but it was not working when we last tested it.
Last edited:
You are correct, I AM nice. And birds are nicer than rats. Rats. Pun intended.
You were also fortunate to have a father to gleam off. My was a farmer, NOT much inspiration there.
I see that you have a 3577. I longed for one of those for a number of years, but somehow I didn`t get one. Thanks to the demise of Tandberg, I ended up with a 8751A instead. Not a bad substitution. One of these days I`ll have to ship it out to Armand. My man of UPV fame. You might call him my Dominik. The way he "plays" the buttons, remind me of Keith Jarrett on piano. Fascinating.
BTW, your tubestage looks "terrible". It should have much more distortion for that "mellow" sound! Snigger snigger.
Roar
You were also fortunate to have a father to gleam off. My was a farmer, NOT much inspiration there.
I see that you have a 3577. I longed for one of those for a number of years, but somehow I didn`t get one. Thanks to the demise of Tandberg, I ended up with a 8751A instead. Not a bad substitution. One of these days I`ll have to ship it out to Armand. My man of UPV fame. You might call him my Dominik. The way he "plays" the buttons, remind me of Keith Jarrett on piano. Fascinating.
BTW, your tubestage looks "terrible". It should have much more distortion for that "mellow" sound! Snigger snigger.
Roar
Roar,
To be honest, while I inherited my fathers skill, he practically spent zero time teaching any electronics (or anything for that matter), I watched him when ever I could - when ever he ever allowed me to, and tock apart every electronic item I could lay my hands on Maybe your father was a farmer, but I'm sure he was more of a father!
Hey the 8751A looks like a better machine then the older 3577A! the only thing I can see that could cause a problem is that its only 50 ohms input (the 3577A has both 50R & 1M).
Still trying to get sensible Phase / Gain measurements - off coarse if I'm going to add an Op-amp buffer into the feedback loop, I might as will dump the current probe and inject the stiimulas via the op-amp!
To be honest, while I inherited my fathers skill, he practically spent zero time teaching any electronics (or anything for that matter), I watched him when ever I could - when ever he ever allowed me to, and tock apart every electronic item I could lay my hands on
Maybe your father was a farmer, but I'm sure he was more of a father!Hey the 8751A looks like a better machine then the older 3577A! the only thing I can see that could cause a problem is that its only 50 ohms input (the 3577A has both 50R & 1M).
Still trying to get sensible Phase / Gain measurements - off coarse if I'm going to add an Op-amp buffer into the feedback loop, I might as will dump the current probe and inject the stiimulas via the op-amp!
Another feature of the HP3577A that caught me out is that if you perform single sweeps and have averaging on, the analysers does not perform the number of Averages required on each press of the trigger button to initiate the "single sweep" - rather it just performs a single sweep and adds the most recent sweep data with the existing average stored data...
This really confused me as to what was going on, each single sweep was a combination of old and new data and did not make sense, initially I suspected that the analysers was faulty in a rather odd way.
Every other machine I've used in the past would perform all the data acquisition required for the number of Averages set on each "single sweep" - my bad, on the 3577A a single sweep is just that! (OK, I had wondered why the sweep time did not increase with higher Avg settings)!
This really confused me as to what was going on, each single sweep was a combination of old and new data and did not make sense, initially I suspected that the analysers was faulty in a rather odd way.
Every other machine I've used in the past would perform all the data acquisition required for the number of Averages set on each "single sweep" - my bad, on the 3577A a single sweep is just that! (OK, I had wondered why the sweep time did not increase with higher Avg settings)!
Last edited:
Looks like HP also recommends this injection transformer:-
https://www.picotest.com/products_J2101A.html
Looking at the data sheet and the upper end of the Bandwidth looks very messy - with a deep notch at 20MHz - I don't understand how these are rated to 45MHz.
https://www.picotest.com/products_J2101A.html
Looking at the data sheet and the upper end of the Bandwidth looks very messy - with a deep notch at 20MHz - I don't understand how these are rated to 45MHz.
Last edited:
A parenthetical -- there are quite a few old HP "hands" on the Yahoo group hp_agilent_equipment.
I have a wonderful 3577A and 35677 S-Parameter Test Set. Most likely yours can be programmed via HP-IB. Jan also had a 3577 but sold it.
For audio, the Jensen JT-123-BLCF is very good as an injection transformer.
Micrel had this interesting application note (it was also in EDN) http://www.micrel.com/_PDF/App-Hints/ah-73.pdf
I have a wonderful 3577A and 35677 S-Parameter Test Set. Most likely yours can be programmed via HP-IB. Jan also had a 3577 but sold it.
For audio, the Jensen JT-123-BLCF is very good as an injection transformer.
Micrel had this interesting application note (it was also in EDN) http://www.micrel.com/_PDF/App-Hints/ah-73.pdf
for stability you really want flat or at least tolerable (to calibrate out - no notches) response for decades on both sides of your loop gain intercept
for many audio circuits the unity loop gain intercept will be in the single digit MHz - a 100 MHz upper injection xfmr BW is not unreasonable to want - whether its doable?
the obvious thing to give up is the lower end - accept a >10 kHz lower corner frequency for the coupling xfmr, single layer winding to reach higher
so several different xmfr may be required to patch together 6+ decade loop gain plots
for many audio circuits the unity loop gain intercept will be in the single digit MHz - a 100 MHz upper injection xfmr BW is not unreasonable to want - whether its doable?
the obvious thing to give up is the lower end - accept a >10 kHz lower corner frequency for the coupling xfmr, single layer winding to reach higher
so several different xmfr may be required to patch together 6+ decade loop gain plots
Since I last posted I build an active summer, and it pretty close to the Current probe result so I'm beginning to have more faith in my measurement set-up - that said I only have a collection results at the moment with no conclusion.
I'll post the schematic of the Active summer and screen dumps of the bode plots later, unfortunately the computers in the lab are not networked to my home computer that I'm currently posting from...
I'll post the schematic of the Active summer and screen dumps of the bode plots later, unfortunately the computers in the lab are not networked to my home computer that I'm currently posting from...
Last edited:
I've my 3577 connected to my PC via GPIB to USB pod to capture the screen dumps using John Miles excellent GPIB tool kit (HP Plotter emulator).
John Miles KE5FX
KE5FX GPIB Toolkit
http://www.micrel.com/_PDF/App-Hints/ah-73.pdf
Thanks for the link, I'd already started work on building an active summer...
Last edited:
- Status
- This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.