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Old 12th March 2013, 07:06 AM   #11
1audio is offline 1audio  United States
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I have both TI's and ADI's dev tools (free downloads) and except for things like Dolby, DTS and other uninteresting stuff its all free.

The current need would be to mix two or four ADC's to get better SNR. I'm not sure what else but anything from level detection to DC offset. Being software it can always be added later.
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Old 12th March 2013, 07:12 AM   #12
davada is offline davada  Canada
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Quote:
Originally Posted by 1audio View Post
I have both TI's and ADI's dev tools (free downloads) and except for things like Dolby, DTS and other uninteresting stuff its all free.

The current need would be to mix two or four ADC's to get better SNR. I'm not sure what else but anything from level detection to DC offset. Being software it can always be added later.

So the free version of ccs5 will work then.

I was thinking two ADC mixing all for channels.

Does TI have any really small DSP. I have to the hay soon so I can't look now.
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Old 12th March 2013, 07:15 AM   #13
mkc is offline mkc  Denmark
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Hi David,

A FPGA would be nice. However, one could also consider changing the CPU as mentioned before. ST has a cortex M4 variant STM32F407VGT6. It's reasonably priced and could perhaps be an option. As far as I remember it only has one I2S port.

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Mogens
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Old 12th March 2013, 07:33 AM   #14
1audio is offline 1audio  United States
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How small? Some are in chip scale packages. Or smaller in function? Many options.

My guess is that we would need 2-4 I2S in and 1 I2S out. Needs to run 192 KHz sample rate, lower power and cheap. I'll see what's possible in the next few days.

We are playing with a TI part that could do both USB and DSP, but working code is some ways off for the USB.
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Old 12th March 2013, 07:47 AM   #15
davada is offline davada  Canada
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Quote:
Originally Posted by 1audio View Post
How small? Some are in chip scale packages. Or smaller in function? Many options.

My guess is that we would need 2-4 I2S in and 1 I2S out. Needs to run 192 KHz sample rate, lower power and cheap. I'll see what's possible in the next few days.

We are playing with a TI part that could do both USB and DSP, but working code is some ways off for the USB.
I meant small in functionality which equates to small in size as well.
Yes 4 in and one out. I don't think 192 is all that fast for these things. They can probably go a lot faster. Programming USB is a pain. I rather just modify existing code for that which is what I did with the PIC. And then there's the driver issues.

Let's keep it as simple as possible for now. Mods can come later.
If it gets too complicated we'll never get it done. Do you have the time?
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Old 12th March 2013, 07:51 AM   #16
davada is offline davada  Canada
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Quote:
Originally Posted by mkc View Post
Hi David,

A FPGA would be nice. However, one could also consider changing the CPU as mentioned before. ST has a cortex M4 variant STM32F407VGT6. It's reasonably priced and could perhaps be an option. As far as I remember it only has one I2S port.

Best regards,
Mogens
I don't have the time to learn a new language. If I had the skills I would consider it.
The SDR/Audio widget is open source but it is protected. Unless the owners want to switch processors I don't think that's going to happen.
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Old 12th March 2013, 07:58 AM   #17
mkc is offline mkc  Denmark
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Originally Posted by davada View Post
I don't have the time to learn a new language. If I had the skills I would consider it.
The SDR/Audio widget is open source but it is protected. Unless the owners want to switch processors I don't think that's going to happen.
I understand. Although the existing Audio widget code is in plain C. I think it would be doable to port that.

However, considering the wish for keeping the orginal widget HW, I woild suggest an FPGA. How about contacting Ian here on the board and hear if he could be pusuaded to help?

Mogens
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Old 12th March 2013, 02:31 PM   #18
borges is offline borges  Norway
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I read the app-note at http://www.akm.com/AppsNotes/AN120516.pdf. Interesting stuff!

Doing math on I2S signals is a big hassle. If the bits were only to come out LSB first we could use inline adders. My instinct says:
1) 4-channel I2S input if we find an MCU setup which supports that.
2) FPGA. I've done similar things in Xilinx+Verilog, and the summing seems quite straightforward.

The trouble with 1) is that a lot of code is AVR32-centric in the existing project. The trouble with 2) is IMHO cost and complexity. The Xilinx tools are free (beer).

It is very doable to make an MCU program which receives a binary file and uses it to flash the config memory of an FPGA using SPI and GPIO. Starting from scratch, such a setup would first boot the MCU's bootloader, then program the MCU, then fill the FPGA's config memory, and then start the application on each consecutive reboot.

A SPARTAN-3A 50K is more than enough. DigiKey says it's $7@100. Add to that a couple $ for the config memory and a fee to get it assembled.

Here's my suggestion: Don't let the need for summing rule this out. Let's come up with a nice PSU and analog design. I can handle the FPGA parts and organize a group buy of assembled units.

BÝrge
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Old 12th March 2013, 06:06 PM   #19
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Quote:
Originally Posted by borges View Post

Here's my suggestion: Don't let the need for summing rule this out. Let's come up with a nice PSU and analog design. I can handle the FPGA parts and organize a group buy of assembled units.

BÝrge
Page 19 of the AK5394A datasheet has an input circuit shown and described. S/N+D is 105dB, gain -14.5dB, fc=320kHz for the LPF, and fc=0.7Hz for the HPF. I guess the bias is to center the analog signal between ground and VA+ (5V).

I'm sure some of the analog mavens here can do better than a S/N+D of better than 105dB, but maybe not... I don't know what the THD would be for this circuit.

Anyway, I'm sure everyone has already read the data sheet...

I've also attached the input circuit TI recommends for the PCM4222, using the OPA1632. Maybe there's even better performing differential opamps out there, I don't know.
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File Type: jpg AK5394A input fig 9.JPG (46.2 KB, 116 views)
File Type: jpg OPA1632 input for ADC.JPG (49.5 KB, 116 views)
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Old 12th March 2013, 07:38 PM   #20
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I suggest the first kick at the can would be to build the simpler, single AK5388 mono-design shown in Fig.1 of the app note. It has a simple mux for the output and puts off the fussy FGPA work until later.

It would allow the creation/testing of the analog input stages , clocks and power supplies. The output of the card would be plain vanillia I2S. Theoretically the card should be able to mate with any I2S engine, commercial or open-source.

George
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