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Old 1st July 2013, 03:17 AM   #181
jcx is offline jcx  United States
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haven't checked recently for new chips but I do have AD7690, AD7982 datasheets on my computer

look thru the performance graphs - for the THD vs frequency - the LTC parts THD rises rapidly with frequency above their bullet item 2 kHz THD
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Old 1st July 2013, 07:52 PM   #182
sidiy is offline sidiy  Canada
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Watch for the release of the AK5397 with 4dB more dynamic range than the AK5394. A preliminary datasheet (or samples/development boards) is not available yet.
So far it seems the best bet for diy (with a very good front end.....)
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Old 1st July 2013, 08:01 PM   #183
jcx is offline jcx  United States
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I really don't see the AKM beating the faster, better AD parts on most specs

you do have to allow for differing meaurement bandwidths to compare S/N - but the AD graphs clearly beat on distortion vs audio frequencies

and as SAR there are no helpful hints like AKM's on providing DC offest to keep the Delta-Simga modulator from producing spur tones
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Old 10th July 2013, 12:43 AM   #184
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The SAR ADCs mentioned here all seem to be clocked by FPGA on their respective EVM designs.

Which will have a certain level of jitter leading to a reduction in SNR at higher input freq. I've been daydreaming for a little while on ways to replace the sample clock with a OSC + counter/logic. As yet I haven't found counters that have very good AC specs, the one that concerns me is that most seem to have a wide spread of propagation delay times, even with stable temp. Anyone got any better ideas because it seems to me that looking for high(er) freq analysis with these chips the sample clock is rather important.
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Old 10th July 2013, 01:13 AM   #185
ChrisA is offline ChrisA  United States
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Originally Posted by hochopeper View Post
... Anyone got any better ideas because it seems to me that looking for high(er) freq analysis with these chips the sample clock is rather important.

What exactly do you need? What frequency, accuracy and phase noise would be required? There are a couple other ways to get there other than with counters. But need real specs.
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Old 10th July 2013, 01:24 AM   #186
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I'd like to sample out to 250kHz - 500kHz so 1MSPS+ would be my preferred sample rate. I'd like to not be limiting the SNR of the ADC with jitter, so for 18bit (AD7986, LTC2377-20 etc) I think we're at single digit ps range for RMS jitter if I'm not confused by the formula below given in this article - http://cds.linear.com/docs/en/design-note/dn1013f.pdf

Quote:
SNR(dBFS) = –20log(2.pi.f.tj)
Deriving RMS jitter from the propagation delay variation isn't something I'm sure of but a wide variation doesn't seem like a great place to start.
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Old 10th July 2013, 01:58 AM   #187
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Confirming my understanding of the AD7986 sample clock timing requirements:

CNV clock triggers sample, pulse can be from 15 - 70ns long.
CNV line low for the following (1000ns - (CNV pulse width above)) [for 1MSPS, other sample rate substitute clock period as required]


I'm thinking the answer will use some sort of flip flop divider - possibly PO74G374A would be a good chip to work with, though it gives little detail on the variation of propagation delay and cascading flip flops to achieve frequency divider then feeding into an OR to satisfy the above requirements doesn't feel like the right solution either.

Last edited by hochopeper; 10th July 2013 at 02:24 AM.
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Old 10th July 2013, 04:52 AM   #188
1audio is offline 1audio  United States
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Originally Posted by sidiy View Post
Watch for the release of the AK5397 with 4dB more dynamic range than the AK5394. A preliminary datasheet (or samples/development boards) is not available yet.
So far it seems the best bet for diy (with a very good front end.....)
I met with the designer of the chip last week. Its in process (has been since 2008) but don't expect anything this year. However you can bond 2 AK5394A's and get an improvement. The AK5394A is still clearly the best performing chip I have tested.
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Old 10th July 2013, 05:05 AM   #189
1audio is offline 1audio  United States
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If I were making the effort to build a high performance digitizer with a bandwidth higher than audio (100 KHz) I would use this: http://cds.linear.com/docs/en/datasheet/22165f.pdf It expensive ($70+ for the chip) but it can deliver the goods. Here is a device build from it that demonstrates what is possible, complete with schematics from which you can get ideas for clocking and other processing: http://www.miles.io/TimePod_5330A_user_manual.pdf

However you can buy USB scopes that can do this for a pretty reasonable price. Check that the software is good. Here is an example of a really good value: QA100 USB Oscilloscope $349 It beats reinventing the wheel, since none of this stuff will work with audio software.
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Old 10th July 2013, 10:53 AM   #190
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Originally Posted by 1audio View Post
If I were making the effort to build a high performance digitizer with a bandwidth higher than audio (100 KHz) I would use this: http://cds.linear.com/docs/en/datasheet/22165f.pdf It expensive ($70+ for the chip) but it can deliver the goods. Here is a device build from it that demonstrates what is possible, complete with schematics from which you can get ideas for clocking and other processing: http://www.miles.io/TimePod_5330A_user_manual.pdf

However you can buy USB scopes that can do this for a pretty reasonable price. Check that the software is good. Here is an example of a really good value: QA100 USB Oscilloscope $349 It beats reinventing the wheel, since none of this stuff will work with audio software.
Thanks for the links Demian!

That chip is certainly very interesting indeed, datasheet saved for more detailed reading over the next few days.

I'm not wedded to the idea of doing it myself but I quite like the learning and I'm a bit averse to buying a windows computer specifically for this task. Though that may be the eventual conclusion after I do a read around.

So I was looking into options and it's an interesting way to learn something new. I'm hoping to do the capture in embedded linux and use iPython Notebooks + numpy/scipy for the signal analysis. The ARM based linux board would just do data capture.

The SPI/I2C output of the SAR chips that I mentioned was appealing from a data capture from the embedded linux point of view.

Another option that I thought of is to use PWM from realtime co-processor (PRU-ICSS) in the AM3359 that I'll have in the BeagleBone initially eventually in BeagleBone Black or Olimex A10S. However that PWM is operating from a synthetic 100MHz clock and I'm not finding much info about how stable it is, except that they had jitter problems using an internal clock for 25MHz clock for RMII comms in their realtime RISC co-processor. So that doesn't inspire confidence. I'm also looking into the clock management in there to see if I can get the PWM interface to slave to another clock ... even if that works, it's hard to know in advance if that will be 'good enough'. There is over 1500 pages of tech docs on this processor though so it's hard to read and digest in a hurry

I may have a few too many options to digest now but that's better than having no options!
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