Audio Precision 2522 problem

Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.
Hi to Everybody,

Recently I start to have a problem with my 2522 system, DSP problem.
When I start AP software first I have error code: 11161 and than Error (8501) (Undefined DSP Error) and than Error 8611 (APIB communication problem).
Analog part of analyzer (sign Gen & Sign ANL) is working ok.

I've checked all power supply rails also on DSP PCB, and everything is seems to be ok. Does anybody have a schematic for DSP section ? or any thoughts ?


Thank you,
Radek
 
Hello everybody,

You really got the CPLD firmware ?
That's really interesting, I have a SYS-2522 that won't give any digital output anymore. It seems that the CPLDs around the fpga in the DIO board are generating wrong signals (for example, pulling down the reset lines of the DDS chips (AD9831) used to generate these signals).
The data retention is given for 20 years for these CPLD, perhaps one of them has corrupted data...

How did you read them ?

Thanks in advance,

Jerome.
 
Hi jipihorn,

From what I remembered, all the different boards are separated (analog input, analog output, digital input, digital output).
The SUBD25 input connector at the back accesses each board in a parallel bus, similar to what can be found on the old 68000 microprocessor architecture.
The buffers let the data go in, out or tristate. On my 2522, changing these makes my unit working again, except the digital output section, but I think it is a CPLD problem as it is very hot.
 
Hi jipihorn,

From what I remembered, all the different boards are separated (analog input, analog output, digital input, digital output).
The SUBD25 input connector at the back accesses each board in a parallel bus, similar to what can be found on the old 68000 microprocessor architecture.
The buffers let the data go in, out or tristate. On my 2522, changing these makes my unit working again, except the digital output section, but I think it is a CPLD problem as it is very hot.

Thank you a lot !

So, if I understand well, you had several problems, some of them due to the buffers with a remaining one you think to be a CPLD problem.

Did you get spare CPLDs ? I've found some sources but I don't know which programming environment can be used to program them. I guess that they should be programmed externally with a ZIF socket or what have you, but as it is an old reference, I'm not sure if it is still supported by Xilinx's tools...

I'll receive buffers tomorrow or so and I'll begin with changing them. I suppose that only Fairchild chips are to change. I have similar chips from Idt on the boards.

Did you changed the chips on the DIO or DSP (or both) boards ?

If you want, I can make some measurements on my boards (as the inputs are working). It could help you to locate some suspicious points by comparison with yours. Just send me for example a picture with points you want to get the signal.

Jerome.
 
Status
This old topic is closed. If you want to reopen this topic, contact a moderator using the "Report Post" button.