Building a phase noise measurement system for digital audio

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TNT

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A simple jitter experiment:

In the zip file are two 440 Hz 16 bits/48kHz sine signales with the spectrum
as in the picture.

The second has random jitter of 10 nanoseconds (not picoseconds) added to
the sampling clock.

I will bet the first one a beer, that can hear a difference using the foobar ABX test plugin!

You have an odd taste in music.

//
 
The sine signal is a good test case because it help you to concentrate on the difference between the two files. A real music file is much more difficult, because real music
has a lot of harmonics which mask little imperfections like THD or phase noise. And the sine signal is easy to generate in Matlab too.

My intention is to safe you from investing 10000 Euros and 2+ years in building
a top phase noise measuring system, getting a lot of grey hairs in the way, and in the end hearing no difference :)

If you think that you can not hear a difference with 10ns of sample jitter, i add a file with 100ns of jitter here.
This is about 100000 more than a crystal oscillator.
The picture shows the histogram of the sampling jitter.
With this example you can hear that the sampling time jitter sounds like random noise, no spectacular modulation effects are happening.
 

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I'm coming very late to this galactic-sized thread, but here is a scheme that I've used very successfully. It's not dirt-cheap, but it's not insanely expensive either. Best of all, it can measure down to RMS number in the below 10 ps range. For slightly less money it will measure down to, say, less than 50 ps.

John Miles KE5FX, mentioned elsewhere in this thread, has a toolkit that includes very nice software to measure phase noise. It's meant to be connected to an RF spectrum analyzer via IEEE-488 (GPIB). Here's what you need to have/borrow/buy:

A spectrum analyzer. I have an HP8566B, which I got off of eBay for $1500 several years ago. There are others, but this one is particularly sweet for this task, as the close in phase noise is very good, and rivals anything new in the $50K+ price range. Get one in good condition and be sure to see pictures of the screen display. Look closely at the picture and see where the display intensity is set. If it's dialed up all the way, keep looking. It means the tube is very weak. That said, there are very nice LCD retrofit kits for these, but they're a little pricey (~$750, as I recall).

A Prologix USB to IEEE-488 adapter or Prologix Ethernet to IEEE-488 adapter. They ~$200 or so, work perfectly, and get the job done. I prefer the Ethernet version, but either one is fine. Any other computer to GPIB interface that John's software supports will work as well.

A DC block. Get one from Minicircuits Labs, or build one with a couple of connectors and a 100pf or 1000pf NPO cap. This is non-critical, and NOT OPTIONAL, since applying DC, or the DC offset that might be present on a digital signal will destroy your SA. Put this on the input connector and leave it there. Use a 10X probe to connect to your circuit to be safe and only go to a 1X probe when you are sure you know what you're doing.

Use the low-frequency (BNC) input on the HP8566B, since it can measure closer to DC than the other (default) input.

Optionally, for extra low phase noise/jitter measurements, build a GPS Disciplined Oscillator (GPSDO). There are Trimble GPS receivers available on eBay for around ~$200, and antennas (make sure it's one with the proper preamp build in to work with the Trimble) for another $50-100. John Miles toolkit also has software that will talk to these receivers to configure, test, and evaluate them. These receivers were meant for cell tower use, and have ended up so cheap on the surplus market when one giant phone company bought another giant phone company and dumped all their new infrastructure. Using one of these as the 10MHz timebase for the SA will drive the residual jitter of the SA down into the 5-10ps range.

Don't measure the baseband (Word Clock) frequency, if you can at all avoid it. 48kHz is not that far from 0 and your measurement will be limited by having the carrier so close to zero Hz on the SA. Most good clock generators run at a much higher frequency (typically 25 or 50 MHz, but maybe in the 12 MHz range). Measure that signal to get good measurement.

Using John's Phase Noise app let's you directly measure jitter, since RMS jitter is the integral of phase noise over some bandwidth. His program lets you set a low and high frequency range for the calculation and reads out in RMS pS. Typically, you want to calculate jitter over a 100Hz to at least 40 kHz range, depending on your circuit and application. Going below 100Hz is difficult because you're starting to see the skirt of the SA's local oscillator, but you can also tell what you're looking at by the shape of the phase noise plot.

This scheme works really well, and if you're seriously trying to measure phase noise, this is how you do it. There are many other ways to do this, and some of them can be done for little cost. But what you'll find with those is the residual jitter of those methods will be one or two orders of magnitude worse than any worthy clock source, so you won't get much joy--other than building something. Which is cool, of course!

By the way, the math for what jitter translates to in terms of noise floor vs. frequency is:

SNR = 20 log(1/(2*PI*freq*jitter)

where freq is in Hz and jitter is in Seconds. So to get an SNR of 110dB at 15kHz, you need a clock source with jitter less than about 25 ps. THIS is why jitter matters...

Paul
 
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Joined 2007
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Hi Paul,

... Interesting input and perspectives you add ... A couple of comments from me:

* First, it seems to me from the discussion in the TWTMC thread (Andrea Mori et al's build-thread for a low phase noise/jitter clock oscillator) that what may be the most important frequencies to measure in relation to audio are the very close-in frequencies, i.e. the frequencies from, well, "DC" to maybe 1 kHz.

* Second, the phase noise/jitter range that has been looked at in this thread is below 1 ps.

Thus, if I read your post correctly, none of these criteria really are met with the suggestions you make (right?)?

Also, personally - and being DIY- I am looking to find out what may be called the "components" of jitter: I.e. testing some circuitries/solutions to find out which of them are low phase noise solutions - and then using these solutions/principles at other frequencies as well.

To this end I reckon that Herbert's DC Receiver (link in my previous post) may be a good choice, although for a start it means building a couple more oscillators. But it should allow phase noise measurements at close to carrier frequencies - which is where I would mainly like to look.

I notice also that you are a relative newcomer to the diyaudio forums - so welcome ;)

Cheers,

Jesper
 
Hi Jesper,

1ps RMS jitter would result in jitter-induced residual noise of below -130dB at 44kHz. Are you aware of any digital audio systems with a noise floor that low? At 1kHz this is -164dB, which is 20dB better than the limit of 24-bit data.

While I agree that better is always better, from an engineering standpoint the goal should be to properly size the solution to the problem. On the other hand, if the goal it to explore the boundaries of the problem domain, then I'm right there with you.

It's true that there are different way to view the effects of jitter, and close-in noise is certainly a valid one. Again, however, I think you have to view all parameters like this from a systems perspective. All things being equal, if the RMS jitter over the audio bandwidth is well below the system noise floor, the close-in jitter will be as well, assuming that the PDF of the jitter is not oddly shaped and there are no spectral frequencies ("birdies") in the jitter. Looking at the phase noise over the audio bandwidth will provide information on this.

I applaud the search for lower and lower jitter. It used to be, and still is, common to see audio interfaces with clock generators with 1nS jitter, and 200pS used to be considered "good", so there is certainly room for improvement.

I look forward to seeing how your search goes.

Best,

Paul
 
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Just to put a bit of a baseline to this the AK5394A is 123 dB SNR. Its possible to use 4 and get an additional 6 dB. https://www.akm.com/akm/en/file/datasheet/AK5394AVS.pdf
The AK4490 is 123 dN SNR in mono mode: https://www.akm.com/akm/en/file/datasheet/AK4490EQ.pdf

Jitter impact on SNR is a bit more complex since its tied to how the chip uses the clocks and what type of chip. The numbers are correct for a classic ladder dac with sample and hold. Delta Sigma gets better performance from the same clocks, and the sample clock doesn't figure the same way.

The close in phase noise is an issue but its unclear how much of an issue it is. Possible the best way would be a Allen Variance plot. The longer intervals probably don't mean much but the short intervals may. That requires a different method to measure entirely.

For audio there are really two clock familys you need to test- 44.1 and 48. Typically you would be looking at 22 and 24 MHz clocks. because of this if really low residual is needed you would use the double balanced mixer method. Ideally two tunable oscillators and two PLL loops and correlation software to remove the reference oscillator. Its all in the lit and a lot of hassle.

My quickie method using a specific FM tuner will get pretty close (The Yamaha 950 has possibly the lowest noise of any commercial FM tuner) and will show those spurs which are far more significant. Tuning to the 4th harmonic amplifies the phase noise by 12 dB further enhancing the measurement. Doing the math to convert to standard phase noise or jitter however is beyond me. Its not simple.

Except for troubleshooting I think measuring the jitter/noise at the output of a DAC is what is important. If its good go on. If not you have issues. All you need is a reasonable ADC and FFT software.

However in my experience jitter is a solved problem. A good SPDIF receiver can get 20 pS or less from a really bad source. USB is trivial to get very low jitter AS LONG AS the basics are done well. Sharing a gate oscillator chip with any other function and you probably have a real problem.
 
Biggest challenge is the lack of mass of crystals or crystal oscillators. Maybe imbedding in a cast iron block on even rubber would be enough. Wenzel has stuff on active vibration stabilization. The crystals are more sensitive in one axis so its less of a challenge than it first seems.

Sent from my LG-H811 using Tapatalk

Yes, the oscillator needs mass and most likely a significant amount. However as soon as a spring and weight interact = resonance. So IMV some form of damping is also required.

Possibly some form of lossy, damped spring material in conjunction with a lead/steel weighted oscillator can could get desired results.

T
 
A presentation of Mr. Driscoll himself, also covering mechanical noise.
Note that his intended application is fighter airplanes and 'copters.

< https://www.google.de/url?sa=t&rct=...D=1379086362&usg=AOvVaw3YeBNYR_jBJe0drYR2MHlY >

I hope that this monster link works.

To get a feeling what 1ps means: I have a scope plugin that has 9 ps risetime.
This requires 50 GHz of bandwidth to achieve. Ask yourself if your homebrew stuff
has a stability of 1/9 that value.

A good & cheap entry into the phase noise arena could be the measurement of added
phase noise of buffers or sine/CMOS converters. That can be made for less than $50.
All you need is a power splitter, a ring mixer, a lambda\4 delay line, aka 10 meter
of coax cable, a sensitive preamplifier and something that can do FFTs. For gawd's
sake, a sound card.

You don't need more than 1 oscillator, no PLLs to lock oscillators, no cross correlation.
Just optimizing that sine to cmos converter can easily keep you busy for a year.
Look at the pace of that oscillator thread.

BTW. Using a spectrum analyzer to measure phase noise of a good crystal oscillator
is hopeless, unless it's a R&S FSUP that has dual receivers and cross correlation.
You will measure the noise of the spectrum analyzer's sweeper. That might be good
enough for measuring a free running VHF VCO.

I would like to draw your attention on the Red Pitaya. It has 2 14 Bit / 125 MSPS ADCs
and an external clock input. (and DACs, and Linux, and network, and is cheap, ...)

On that hardware, you could do most things that a Timepod can do. It's only software :)
Use the clock input for your oscillator, the 2 ADC inputs as references. They don't
even need to be on the same frequency. Do cross correlation as much as you want.

< Red Pitaya >

cheers, Gerhard
 
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Gerhard thanks for the link. The red Pitaya looks very interesting!

Today I made some phase noise measurements with 2 oscillators and a pll while listening to music, without music and last one dropping the mouse (the computer one!) from 5 cm height.
Vibrations are clearly visible as added phase noise.
To have the phase noise in dBc one should remove 60dB from the yellow curve.
Nothing have been made against vibration, oscillators just sits on the table.

Joël
 

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Thank you, now I can name the colours! I already knew the sky is yellow and the sun is blue. Or something like that, not really sure, maybe it depends on days...?

So green curve is noise within 1 Hz bandwidth, dB/sqr(Hz), blue is RMS voltage in dB and grey-blueish is average when display resolution is lower than frequency resolution.

Joël
 
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Joined 2007
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Hi all,

Hmmm ... I realize that Joël is underways with sharing/explaining his system setup (and I am personally interested in what he can say here), however, I would like to add that I have built Herbert Rutger's DC-Receiver with some additional features that I reckon could be interesting in the context of a flexible phase noise measurement system.

My aim with these additions to Herbert's design has been to be able to evaluate most all of the individual circuit parts of an oscillator so as to test and optimize each individual part. FYI I have attached a picture of the DC-Receiver PCB.

As it is I have not yet had the chance to really try out the DC-Receiver (I a.o.t. need a good-enough ADC to input the DC-Receiver's output to my PC) - yet it is my impression that the PCB is correct. It is rather big, though - so as to provide some spacing between the various circuit sections, and also because it fits into a steel enclosure I already have of this size.


That said the ideas with this PCB have been:

- The cut-outs in the PCB are for mounting an oscillator PCB, a squarer PCB, and a divider PCB (right to left - top right corner). Traces are kept so as to be 50 ohm impedances. On the picture is shown one of Andrea's Driscoll oscillators - which I had already and have used to do preliminary tests of the DC-Receiver.

- To supply the DC-Receiver & DUT oscillators/dividers from batteries. Additionally, to also allow for supply voltage adjustment - as a part of assessing phase noise/jitter relative to supply voltages - there are four very simple, low-noise & adjustable PSUs on the PCB. Basically emitter followers with decoupling and an MPSA18. It is possible to switch between pure battery supply (individually for each circuit part) and these adjustable PSUs. Nothing fancy but low noise, no ringing, and reasonably low output impedance PSUs.

- Close to the right side of the ring mixer (metal part in the center) there are two 50 ohm attenuator resistor networks so that precise adjustment of the DUT oscillator output level is possible. I chose to not place a "jumper-connector" (don't know what the English word is) at this place so here a small piece of wire has to be soldered to connect with the attenuator network used.

- Herbert's "listening circuitry" is also on the PCB (bottom right corner with the potmeter).

- Courtesy a suggestion by 1audio the PLL input to the VCO (Herbert's Clapp oscillator - to have a known reference) can also be switched to a fixed voltage set by a filtered trimpot so that any very low frequency influences from the PLL may be avoided.

- There may also be included a divider circuitry in series with the reference oscillator (/2, /4 - above the ring mixer) so as to test frequencies e.g. where two identical crystals are not available.

Well, this is FYI and possibly for inspiration ... Also, should any of you like a copy of the PCB layout you are welcome (e.g. pdfs of top & bottom).

Cheers,

Jesper
 

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Hi,

here is the schematic of a phase noise meter.
Actually I use a different and much more complex low noise 60dB amplifier with FET input for high input impedance but finally high input impedance is not necessary.
50Ω loading at DC just change the change the phase to voltage conversion form 0.6 volt/radian to 0.3 volt/radian.

Mixer is SRA-1H form minicircuits, 1.9MHz filter is from minicircuits too.
OPA 1611 is low noise bipolar opamp, OPA 1641 is low noise JFET.

The M-off-M switch is useful to set the integrator output to manually help the PLL locking.

Attached is the Wenzel paper "Low cost phase noise measurement" valuable source of inspiration.

Actually I use a DIY DC coupled ADC. Output is optical SPDIF for full galvanic isolation. Schematic is attached.

Joël
 

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